Verilator is a free and open-source software tool which converts Verilog to a cycle-accurate behavioral model in C++ or SystemC. Official reference can be found here.
You can configure debugging tool using debug_tool option in “platformio.ini” (Project Configuration File):
[env:myenv]
platform = ...
board = ...
debug_tool = verilator
More options:
Name  | 
Description  | 
|---|---|
The CHIPS Alliance develops high-quality, open source hardware designs relevant to silicon devices and FPGAs.  | 
Name  | 
Description  | 
|---|---|
FreeRTOS is a real-time operating system kernel for embedded devices that has been ported to 40 microcontroller platforms  | 
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The WD Firmware package contains firmware applications and Processor Support Package (PSP) for various cores, alongside demos which support all features  | 
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The Zephyr Project is a scalable real-time operating system (RTOS) supporting multiple hardware architectures, optimized for resource constrained devices, and built with safety and security in mind  | 
Note
For more detailed board information please scroll tables below by horizontal.
Name  | 
Platform  | 
Debug  | 
MCU  | 
Frequency  | 
Flash  | 
RAM  | 
|---|---|---|---|---|---|---|
On-board  | 
320MHz  | 
16MB  | 
1.16MB  |