Platform NXP LPC: The NXP LPC is a family of 32-bit microcontroller integrated circuits by NXP Semiconductors. The LPC chips are grouped into related series that are based around the same 32-bit ARM processor core, such as the Cortex-M4F, Cortex-M3, Cortex-M0+, or Cortex-M0. Internally, each microcontroller consists of the processor core, static RAM memory, flash memory, debugging interface, and various peripherals.
Microcontroller |
LPC54114J256BD64 |
Frequency |
100MHz |
Flash |
256KB |
RAM |
192KB |
Vendor |
Please use lpc54114
ID for board option in “platformio.ini” (Project Configuration File):
[env:lpc54114]
platform = nxplpc
board = lpc54114
You can override default NXP LPCXpresso54114 settings per build environment using
board_***
option, where ***
is a JSON object path from
board manifest lpc54114.json. For example,
board_build.mcu
, board_build.f_cpu
, etc.
[env:lpc54114]
platform = nxplpc
board = lpc54114
; change microcontroller
board_build.mcu = lpc54114j256bd64
; change MCU frequency
board_build.f_cpu = 100000000L
NXP LPCXpresso54114 supports the following uploading protocols:
cmsis-dap
jlink
mbed
Default protocol is mbed
You can change upload protocol using upload_protocol option:
[env:lpc54114]
platform = nxplpc
board = lpc54114
upload_protocol = mbed
Debugging - “1-click” solution for debugging with a zero configuration.
Warning
You will need to install debug tool drivers depending on your system. Please click on compatible debug tool below for the further instructions and configuration information.
You can switch between debugging Tools & Debug Probes using debug_tool option in “platformio.ini” (Project Configuration File).
NXP LPCXpresso54114 has on-board debug probe and IS READY for debugging. You don’t need to use/buy external debug probe.
Compatible Tools |
On-board |
Default |
---|---|---|
Yes |
Yes |
|
Name |
Description |
---|---|
Arm Mbed OS is a platform operating system designed for the internet of things |
|
Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures |