1 2 3 4 5 6
Power sequencing
Novena PVT2-A
A A
B B
I2C mappings:
addresses are already shifted left by one to accommodate r/w bit
i.e., address is expressed as the write address
I2C1: 10k pull-up
SMBus functions (optional) P1.8V_SW4 has option to power VTT
MMA8452 (0x38) (optional) Use this option to lower VTT source to 1.0V to save power
SO-DIMM identification (0xA0)
FPGA (optional)
SO-DIMM temp sensor (0x30) (optional)
STMPE610 (0x88) (optional)
Gas gauge and charger via SMB (on battery board)
PCF8523 RTC (0xD0)
I2C2: 1.8k pull-up
HDMI DDC (0xA0, 0x74)
expansion header changes on table:
C FPGA (optional) C
PMIC (0x10) P1.8V_VGEN3 micbias gen option
(reprogram to 3.0V before using)
I2C3: 2.2k pull-up
LCD EDID (0xA0)
ES8283 (0x22)
FPGA (optional)
Utility EEPROM (0xAC)
U_02cpu_power U_06cpu_soc U_10ethernet100 U_14audio
02cpu_power.SchDoc 06cpu_soc.SchDoc 10ethernet100.SchDoc 14audio.SchDoc
U_03cpu_sodimm U_07sdcard U_11ethernetGbit U_15fpga
03cpu_sodimm.SchDoc 07sdcard.SchDoc 11ethernetGbit.SchDoc 15fpga.SchDoc
U_04pwr_pmic U_08usb U_12mPCIe U_16gpio_misc
04pwr_pmic.SchDoc 08usb.SchDoc 12mPCIe.SchDoc 16gpio_misc.SchDoc
D D
Copyright 2014 Andrew "bunnie" Huang
U_05pwr_input U_09sata U_13hdmi_lcd Title
05pwr_input.SchDoc 09sata.SchDoc 13hdmi_lcd.SchDoc
Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 B
Date: 7/5/2014 Sheet of
File: F:\largework\..\01docmap.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
Note: 22uF, 6.3V 0603 cap is TDK C1608X5R0J226M
COU100E
U100E
1.375V (power-on), 1.35V (nominal)
VCC_1.2V_SW1AB SW1A/B iMX6Q - MCIMX6Q5EYM12AC
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
i.MX6Q - POWER
10uF, 10V, X5R, 20%
H14
PIU1000H14 H13 NLVDD0ARM0CAP
VDD_ARM_CAP ~1.2V
PIC13C01 C13C PIC14C01C14C COC13C COC14C
PIC15C01 C15C
COC15C
PIC16C01 C16C COC16C
PIC17C01 C17C
COC17C
PIC18C01 C18C
COC18C VDDARM_IN_1 VDDARM_CAP_1 PIU1000H13 PIC19C0C19C
1 COC19C
PIC20C01C20C COC20C
PIC21C01C21C
COC21C
1COC10C
PIC10C C10C PIC12CCOC12C
01
C12C PIC2 C01C22C
COC22C
J14
PIU1000J14 J13
VDDARM_IN_2 VDDARM_CAP_2 PIU1000J13
K14
PIU1000K14 K13
PIC13C02 PIC14C02 PIC15C02 PIC16C02 PIC17C02 PIC18C02 22uF, 6.3V, X5R, 20% VDDARM_IN_3 VDDARM_CAP_3 PIU1000K13 PIC19C02 PIC20C02 PIC21C02 PIC10C 2 PIC12C02 PIC2 C02 22uF, 6.3V, X5R, 20% i.MX6 Q,DL,S: short
no support for i.MX6D - launch SKUs are Q and DL L14
PIU1000L14 L13
PIU1000L13
VDDARM_IN_4 VDDARM_CAP_4
M14 M13
PIU1000M14 VDDARM_IN_5 VDDARM_CAP_5 PIU1000M13
i.MX6 Q,DL,S: short N14 N13 i.MX6 D: open
PIU1000N14 VDDARM_IN_6 VDDARM_CAP_6 PIU1000N13
P14
PIU1000P14 P13 supplied by internal regulator
A VDDARM_IN_7 VDDARM_CAP_7 PIU1000P13 A
i.MX6 D: open R14 R13
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
PIU1000R14
VDDARM_IN_8 VDDARM_CAP_8 PIU1000R13
H11 ~1.2V
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
VDDARM_CAP23_1 PIU1000H11 PIC27C0C27C
1COC27C PIC1 C0C11C
1 COC11C
PIC23C0C23C
1 COC23C
PIC24C0C24C
1 COC24C
PIC26CC26C
01 COC26C
PIC29C01COC29C
J11
VDDARM_CAP23_2 PIU1000J11
C29C i.MX6 Q,DL,S: open
K9
PIU1000K9 K11
PIC89C01 C89C PIC90C 1 C90C PIC91C01 C91C PIC92C01 C92C PIC93C01 C93C PIC30C 1 C30C PIC31C01 C31C PIC32C01 C32C PIC3 C01 C33C PIC34C01 C34C VDDARM23_IN_1 VDDARM_CAP23_3 PIU1000K11 PIC27C02 PIC1 C02 PIC23C02 PIC24C02 PIC26C02 PIC29C0222uF, 6.3V, X5R, 20%
COC89C COC90C COC91C COC92C COC93C COC30C COC31C COC32C COC33C COC34C
L9
PIU1000L9 L11 i.MX6 D: short
VDDARM23_IN_2 VDDARM_CAP23_4 PIU1000L11
i.MX6 Q,DL,S: open M9
PIU1000M9
VDDARM23_IN_3
M11
VDDARM_CAP23_5 PIU1000M11
PIC89C02 PIC90C 2 PIC91C02 PIC92C02 PIC93C02 PIC30C 2 PIC31C02 PIC32C02 PIC3 C02 PIC34C02 22uF, 6.3V, X5R, 20%
N9
PIU1000N9 VDDARM23_IN_4
N11
VDDARM_CAP23_6 PIU1000N11
i.MX6 D: short P9 P11
PIU1000P9 VDDARM23_IN_5 VDDARM_CAP23_7 PIU1000P11
R9
PIU1000R9 R11
VDDARM23_IN_6 VDDARM_CAP23_8 PIU1000R11
GND T9
PIU1000T9 VDDSOC_CAP
VDDARM23_IN_7
U9
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
PIU1000U9
VDDARM23_IN_8
47uF, 6.3V, 20% X5R (CL31A476MQHNNNE)
R10 ~1.2V supplied by internal regulator
VDDSOC_CAP_1 PIU1000R10
PIC38C01COC38C
C38C PIC39C01COC39C
C39C PIC40C01C40C
COC40C PIC41C01C41C
COC41C PIC35C0C35C
1 COC35C
PIC36C01C36C
COC36C
PIC37CC37C
01
COC37C
PIC42C01COC42C
C42C
T10
VDDSOC_CAP_2 PIU1000T10
1.375V (power-on), 1.225V (nominal) T13
PIU1000T13
VDDSOC_CAP_3 PIC38C02 PIC39C02 PIC40C02 PIC41C02 PIC35C02 PIC36C02 PIC37C02 PIC42C0222uF, 6.3V, X5R, 20%
SW1C T14
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
PIU1000T14
VDDSOC_CAP_4
10uF, 10V, X5R, 20%
VDD_SOC_IN_SW1C U10
PIU1000U10
VDDSOC_CAP_5
H16 U13
PIU1000H16 VDDSOC_IN_1 VDDSOC_CAP_6 PIU1000U13
1
PIC43C01COC43C PIC4 C01COC44C
C43C C44C PIC45C01COC45C
C45C
COC52C
PIC52C01 PIC46C01COC46C C46C PIC47C01COC47C C47C PIC48C01COC48C PIC49C01COC49C
C48C C49C PIC50C 1 COC50C PIC51C01 COC51C
C50C C51C J16
PIU1000J16 VDDSOC_IN_2 VDDSOC_CAP_7
U14
PIU1000U14
C52C K16
0.22uF, 6.3V, X5R 10% 0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10% 0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
PIC43C02 PIC4 C02 PIC45C02 PIC52C02 PIC46C02 PIC47C02 PIC48C02 PIC49C02 PIC50C 2 PIC51C02 22uF, 6.3V, X5R,PIU1000K16
20%
L16
PIU1000L16
VDDSOC_IN_3
VDDSOC_IN_4
2 M16 H17 ~1.2V supplied by internal regulator
PIU1000M16
VDDSOC_IN_5 VDDPU_CAP_1 PIU1000H17 PIC56C01COC56C
C56C PIC57C01COC57C
C57C PIC58C01COC58C
C58C PIC59C01COC59C
C59C PIC53C01 COC53C
C53C PIC54C01
COC54C
C54C PIC5 C01
COC55C
C55C PIC60C 1COC60C
C60C
N16 J17
PIU1000N16 VDDSOC_IN_6 VDDPU_CAP_2 PIU1000J17
P16 K17
PIU1000P16 VDDSOC_IN_7 VDDPU_CAP_3 PIU1000K17 PIC56C02 PIC57C02 PIC58C02 PIC59C02 PIC53C02 PIC54C02 PIC5 C02 PIC60C 222uF, 6.3V, X5R, 20%
R16
PIU1000R16 L17
VDDSOC_IN_8 VDDPU_CAP_4 PIU1000L17
T16 M17
0.01uF, 10V, X5R, 10%
0.01uF, 10V, X5R, 10%
PIU1000T16 VDDSOC_IN_9 VDDPU_CAP_5 PIU1000M17
U16
PIU1000U16 N17
VDDSOC_IN_10 VDDPU_CAP_6 PIU1000N17
SW2 P17
0.22uF, 6.3V, X5R 10%
VDDPU_CAP_7 PIU1000P17
P3.0V_VDDHIGH_SW2 PIC62C01COC62C
C62C PIC61C01 COC61C
C61C
3.0V H9 PIC63CC63C
01 COC63C
PIC64C01COC64C
C64C PIC6 C01C66C
COC66C PIC65C01C65C
COC65C
PIC68C01C68C PIC67C01 C67C PIU1000H9 VDDHIGH_IN_1 PIC62C02 PIC61C02 10uF, 10V, X5R, 20%
PID10C1 COC68C COC67C
J9
PIU1000J9 VDDHIGH_IN_2
N12
VDD_CACHE_CAP PIU1000N12 PIC63C02 PIC64C02 PIC6 C02 PIC65C0222uF, 6.3V, X5R, 20%
COD10C
D10C PIC68C02 PIC67C02 10uF, 10V, X5R, 20% VDD_HIGH_CAP
P3.0V_STBY PID10C2 RB751V40,115
VDDHIGH_CAP_1
VDDHIGH_CAP_2
H10
PIU1000H10
J10
PIU1000J10
~2.5V supplied by internal regulator
3.0V G11
PIU1000G11 VDD_SNVS_IN
B B
G9 supplied by internal regulator NLVDD0SNVS0CAP
VDD_SNVS_CAP
VDD_SNVS_CAP PIU1000G9
COC69C
P3.3V_DELAYED PIC70CC70C
1COC70C PIC69C01 C69C
0.22uF, 6.3V, X5R 10%
PIC71C01 A13
PIU1000A13 GND_1
C71C
COC71C
A25
0.22uF, 6.3V, X5R 10%PIU1000A25 GND_2
PIC72C01C72C
COC72C PIC70C 2 PIC69C02 2.2uF, 25V, 10% X5R
PIC71C02 A4
PIU1000A4 GND_3
P19
NVCC_LCD PIU1000P19
P2.5V_VGEN5
A8
PIU1000A8 GND_4
PIC72C02 0.22uF, 6.3V, X5R 10%
AA10
PIU1000AA10 GND_5
PIC73CC73C
01
COC73C
AA13 N7
PIU1000AA13 GND_6 NVCC_CSI PIU1000N7
AA16
PIU1000AA16 GND_7
VDD_HIGH_CAP PIC73C02
0.22uF, 6.3V, X5R 10%
AA19
PIU1000AA19 GND_8
AA22
PIU1000AA22 K7
GND_9 NVCC_MIPI PIU1000K7
AA7
PIU1000AA7 GND_10
PIC74C0C74C
1 COC74C
AB24
PIU1000AB24 GND_11
AB3
PIU1000AB3 GND_12 NVCC_EIM0
K19
PIU1000K19
PIC74C02 0.22uF, 6.3V, X5R 10%
AD10
PIU1000AD10 GND_13
AD13
PIU1000AD13 L19
GND_14 NVCC_EIM1 PIU1000L19
AD16 P2.5V_VGEN5
PIU1000AD16 GND_15
AD19 M19
PIU1000AD19 GND_16 NVCC_EIM2 PIU1000M19
AD22
PIU1000AD22 GND_17
AD4
PIU1000AD4 GND_18 PIC75CCOC75C
01
C75C PIC25C01COC25C
C25C
AD7 R19
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
PIU1000AD7 GND_19 NVCC_ENET PIU1000R19
AE1
PIU1000AE1 GND_20
PIC75C00.22uF,
2 6.3V, X5R 10% PIC25C0222uF, 6.3V, X5R, 20%
AE25 P3.3V_DELAYED
PIU1000AE25 GND_21
B4 P7
0.22uF, 6.3V, X5R 10%
PIU1000B4 GND_22 NVCC_GPIO PIU1000P7
C1
PIU1000C1 GND_23
PIC76COC76C
C01
C76C PIC7 C01COC77C
C77C PIC78C01COC78C
C78C PIC79C01COC79C
C79C
C10
PIU1000C10 GND_24
NLNVCC0PLL0OUT
NVCC_PLL_OUT
C4
PIU1000C4 GND_25
E8
NVCC_PLL_OUT PIU1000E8
PIC81CC81C
01COC81C PIC80C 1 C80C COC80C
PIC76C02 PIC7 C02 PIC78C02 PIC79C02
C6 P2.5V_VGEN5
PIU1000C6 GND_26
D3
PIU1000D3 GND_27 PIC81C02 PIC80C 2
D6
PIU1000D6 GND_28 NVCC_RGMII
G18
PIU1000G18
COC28C
C28C PIC28C01 PIC82C01
COC82C
C82C 10uF, 10V, X5R, 20%
D8 P3.3V_DELAYED
PIU1000D8 GND_29 PIC28C020.22uF, 6.3V, X5R 10%PIC82C00.22uF,
2 6.3V, X5R 10%
E5
PIU1000E5 GND_30
E6
PIU1000E6 GND_31
G16
NVCC_SD1 PIU1000G16
PIC84C01
C84C
COC84C
E7 P3.3V_DELAYED
PIU1000E7 GND_32
F5
PIU1000F5 GND_33
PIC84C02 0.22uF, 6.3V, X5R 10%
F6
PIU1000F6 GND_34 NVCC_SD2
G17
PIU1000G17
PIC85C01COC85C
C85C
F7
PIU1000F7
C GND_35 C
F8
PIU1000F8 GND_36
P3.3V_DELAYED PIC85C02 0.22uF, 6.3V, X5R 10%
G10 G14
PIU1000G10 GND_37 NVCC_SD3 PIU1000G14
G19
PIU1000G19 GND_38 PIC86CC86C
01 COC86C
G3
PIU1000G3 GND_39 PIC86C020.22uF, 6.3V, X5R 10%
H12 G15 P3.3V_DELAYED
PIU1000H12 GND_40 NVCC_NANDF PIU1000G15
H15
PIU1000H15 GND_41
H18
PIU1000H18 GND_42
PIC87CC87C
01COC87C
H8 J7
PIU1000H8 GND_43 NVCC_JTAG PIU1000J7
J12
PIU1000J12 GND_44 PIC8 C01 C88C
COC88C PIC87C02
0.22uF, 6.3V, X5R 10%
J15
PIU1000J15 GND_45
J18
PIU1000J18 GND_46
C8
GPANAIO PIU1000C8
PIC8 C020.22uF, 6.3V, X5R 10%
J2 A5
PIU1000J2 GND_47 FA_ANA PIU1000A5 COJ10C
J8 B5 J10C
PIU1000J8 GND_48 VDD_FA PIU1000B5
K10
PIU1000K10 GND_49 PIJ10C01 1
K12
PIU1000K12 GND_50
K15 test point (DNP)
PIU1000K15 GND_51
K18 T12 J11C
COJ11C
PIU1000K18 GND_52 GND_80 PIU1000T12
K8 T15
PIU1000K8 GND_53 GND_81 PIU1000T15 PIJ11C01 1
L10 T17
PIU1000L10 GND_54 GND_82 PIU1000T17
L12 T19 test point (DNP)
PIU1000L12 GND_55 GND_83 PIU1000T19
L15
PIU1000L15 GND_56 GND_84
T8
PIU1000T8
COJ12C
J12C
L18 U11
PIU1000L18 GND_57 GND_85 PIU1000U11 PIJ12C01 1
L2 U12
PIU1000L2 GND_58 GND_86 PIU1000U12
L5 U15 test point (DNP)
PIU1000L5 GND_59 GND_87 PIU1000U15
L8 U17
PIU1000L8 GND_60 GND_88 PIU1000U17
M10 U8
PIU1000M10 GND_61 GND_89 PIU1000U8
M12 U19
PIU1000M12 GND_62 GND_90 PIU1000U19
M15 V8
PIU1000M15 GND_63 GND_91 PIU1000V8
M18 V19
PIU1000M18 GND_64 GND_92 PIU1000V19
M8 W3
PIU1000M8 GND_65 GND_93 PIU1000W3
N10 W7
PIU1000N10 GND_66 GND_94 PIU1000W7
N15 W8
PIU1000N15 GND_67 GND_95 PIU1000W8
N18 W9
PIU1000N18 GND_68 GND_96 PIU1000W9
N8 W10
PIU1000N8 GND_69 GND_97 PIU1000W10
P10 W11
PIU1000P10 GND_70 GND_98 PIU1000W11
P12 W12
PIU1000P12 GND_71 GND_99 PIU1000W12
P15 W13
PIU1000P15 GND_72 GND_100 PIU1000W13
D P18 W15 D
PIU1000P18 GND_73 GND_101 PIU1000W15
P8 W16
PIU1000P8 GND_74 GND_102 PIU1000W16
R12 W17
PIU1000R12 GND_75 GND_103 PIU1000W17
R15 W18
PIU1000R15 GND_76 GND_104 PIU1000W18
R17 W19
PIU1000R17 GND_77 GND_105 PIU1000W19
R8 Y5
PIU1000R8 GND_78 GND_106 PIU1000Y5
T11 Y24
PIU1000T11 GND_79 GND_107 PIU1000Y24
Copyright 2014 Andrew "bunnie" Huang
Title
Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 C
Date: 7/5/2014 Sheet of
File: F:\largework\..\02cpu_power.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4
0.01uF, 10V, X5R, 10%
0.22uF, 6.3V, X5R 10%
PIC10M 1 COC10M
PIC1 M01 COC11M
P0.75V_REFDDR
C10M C11M COJP10M
JP10M
COU100J
U100J PIC10M 2 PIC1 M02 PIJP10M01
1
VREFDQ VSS PIJP10M02
2
iMX6Q - MCIMX6Q5EYM12AC 3
PIJP10M03 4
PIJP10M04 NLDDR30D4
DDR3_D4
A NLDDR30D0 VSS DQ4 NLDDR30D5 A
i.MX6Q - DDR DDR3_D0 5
PIJP10M05 6
PIJP10M06 DDR3_D5
NLDDR30D1 DQ0 DQ5
GND DDR3_D1 7
PIJP10M07 8
PIJP10M08
DQ1 VSS NLDDR30DQS00N
DDR3_D0 PIU1000AD2
AD2 AC14
PIU1000AC14 DDR3_A0 9
PIJP10M09 10
PIJP10M010 DDR3_DQS0_N
DDR_D0 i DRAM_D0 DRAM_A0 i DDR_CTL NLDDR30DM0 VSS DQS0_N NLDDR30DQS00P
DDR3_D1 PIU1000AE2
AE2 AB14
PIU1000AB14 DDR3_A1 DDR3_DM0 11
PIJP10M011 12
PIJP10M012 DDR3_DQS0_P
DDR_D0 i DRAM_D1 DRAM_A1 i DDR_CTL DM0 DQS0_P
DDR3_D2 PIU1000AC4
AC4 AA14
PIU1000AA14 DDR3_A2 13
PIJP10M013 14
PIJP10M014
DDR_D0 i DRAM_D2 DRAM_A2 i DDR_CTL NLDDR30D2 VSS VSS NLDDR30D6
DDR3_D6 PIU1000AA5
AA5 Y14 DDR3_A3 DDR3_D2 15 16 DDR3_D6
DDR_D0 i DRAM_D3 DRAM_A3 PIU1000Y14
i DDR_CTL NLDDR30D3
PIJP10M015
DQ2 DQ6 PIJP10M016
NLDDR30D7
DDR3_D4 PIU1000AC1
AC1 W14 DDR3_A4 DDR3_D3 17 18 DDR3_D7
DDR_D0 i DRAM_D4 DRAM_A4 PIU1000W14 i DDR_CTL PIJP10M017 DQ3 DQ7 PIJP10M018
DDR3_D5 PIU1000AD1
AD1 AE13 DDR3_A5 19 20
DDR_D0 i DRAM_D5 DRAM_A5 PIU1000AE13 i DDR_CTL NLDDR30D8
PIJP10M019 VSS VSS PIJP10M020
NLDDR30D12
DDR3_D3 PIU1000AB4
AB4 AC13
PIU1000AC13 DDR3_A6 DDR3_D8 21
PIJP10M021 22
PIJP10M022 DDR3_D12
DDR_D0 i DRAM_D6 DRAM_A6 i DDR_CTL DQ8 DQ12
DDR3_D7 PIU1000AE4
AE4 Y13
PIU1000Y13 DDR3_A7 NLDDR30D9
DDR3_D9 23
PIJP10M023 24
PIJP10M024 NLDDR30D13
DDR3_D13
DDR_D0 i DRAM_D7 DRAM_A7 i DDR_CTL DQ9 DQ13
DDR3_DQS0_PPIU1000AE3
AE3 AB13
PIU1000AB13 DDR3_A8 25
PIJP10M025 26
PIJP10M026
DRAM_SDQS0 DRAM_A8 i DDR_CTL NLDDR30DQS10N VSS VSS NLDDR30DM1
DDR3_DQS0_N AD3
PIU1000AD3 AE12
PIU1000AE12 DDR3_A9 DDR3_DQS1_N 27
PIJP10M027 28
PIJP10M028 DDR3_DM1
DRAM_SDQS0_B DRAM_A9 i DDR_CTL NLDDR30DQS10P DQS1_N DM1 NLDDR30RESET
DDR3_DM0PIU1000AC3
AC3 AA15
PIU1000AA15 DDR3_A10 DDR3_DQS1_P 29
PIJP10M029 30
PIJP10M030 DDR3_RESET
DDR_D0 i DRAM_DQM0 DRAM_A10 i DDR_CTL DQS1_P RESET_N
AC12 DDR3_A11 31 32
DRAM_A11 PIU1000AC12
i DDR_CTL NLDDR30D10
PIJP10M031
VSS VSS PIJP10M032
NLDDR30D14
DDR3_D8 PIU1000AD5
AD5 AD12 DDR3_A12 DDR3_D10 33 34 DDR3_D14
DDR_D1 i DRAM_D8 DRAM_A12 PIU1000AD12
i DDR_CTL NLDDR30D11
PIJP10M033
DQ10 DQ14 PIJP10M034
NLDDR30D15
DDR3_D12 PIU1000AE5
AE5 AC17 DDR3_A13 DDR3_D11 35 36 DDR3_D15
DDR_D1 i DRAM_D9 DRAM_A13 PIU1000AC17 i DDR_CTL PIJP10M035 DQ11 DQ15 PIJP10M036
DDR3_D13 PIU1000AA6
AA6 AA12 DDR3_A14 37 38
DDR_D1 i DRAM_D10 DRAM_A14 PIU1000AA12 i DDR_CTL NLDDR30D16
PIJP10M037 VSS VSS PIJP10M038
NLDDR30D20
DDR3_D14 PIU1000AE7
AE7 Y12 DDR3_A15 DDR3_D16 39 40 DDR3_D20
DDR_D1 i DRAM_D11 DRAM_A15 PIU1000Y12 i DDR_CTL NLDDR30D17
PIJP10M039 DQ16 DQ20 PIJP10M040
NLDDR30D21
DDR3_D11 PIU1000AB5
AB5 DDR3_D17 41
PIJP10M041 42
PIJP10M042 DDR3_D21
DDR_D1 i DRAM_D12 DQ17 DQ21
DDR3_D15 PIU1000AC5
AC5 AC15 DDR3_BA0 43 44
DDR_D1 i DRAM_D13 DRAM_SDBA0 PIU1000AC15 i DDR_CTL NLDDR30DQS20N
PIJP10M043 VSS VSS PIJP10M044
NLDDR30DM2
DDR3_D9 PIU1000AB6
AB6 Y15 DDR3_BA1 DDR3_DQS2_N 45 46 DDR3_DM2
DDR_D1 i DRAM_D14 DRAM_SDBA1 PIU1000Y15 i DDR_CTL NLDDR30DQS20P PIJP10M045 DQS2_N DM2 PIJP10M046
DDR3_D10 PIU1000AC7
AC7 AB12 DDR3_BA2 DDR3_DQS2_P 47 48
DDR_D1 i DRAM_D15 DRAM_SDBA2 PIU1000AB12 i DDR_CTL PIJP10M047 DQS2_P VSS PIJP10M048
NLDDR30D22
DDR3_DQS1_PPIU1000AD6
AD6 49
PIJP10M049 50
PIJP10M050 DDR3_D22
DRAM_SDQS1 NLDDR30D18 VSS DQ22 NLDDR30D23
DDR3_DQS1_N AE6 DDR3_D18 51 52 DDR3_D23
PIU1000AE6
DRAM_SDQS1_B NLDDR30D19
PIJP10M051
DQ18 DQ23 PIJP10M052
DDR3_DM1PIU1000AC6
AC6 DDR3_D19 53 54
DDR_D1 i
B DRAM_DQM1 PIJP10M053 DQ19 VSS PIJP10M054
NLDDR30D28 B
55 56 DDR3_D28
NLDDR30D24
PIJP10M055 VSS DQ28 PIJP10M056
NLDDR30D29
DDR3_D16 PIU1000AB7
AB7 Y16 DDR3_CS0 DDR3_D24 57 58 DDR3_D29
DDR_D2 i DRAM_D16 DRAM_CS0 PIU1000Y16 i DDR_CTL NLDDR30D25
PIJP10M057 DQ24 DQ29 PIJP10M058
DDR3_D22 PIU1000AA8
AA8 AD17 DDR3_CS1 DDR3_D25 59 60
DDR_D2 i DRAM_D17 DRAM_CS1 PIU1000AD17 i DDR_CTL PIJP10M059 DQ25 VSS PIJP10M060
DDR3_D19 PIU1000AB9
AB9 61
PIJP10M061 62
PIJP10M062 NLDDR30DQS30N
DDR3_DQS3_N
DDR_D2 i DRAM_D18 NLDDR30DM3 VSS DQS3_N NLDDR30DQS30P
DDR3_D21 PIU1000Y9
Y9 DDR3_DM3 63
PIJP10M063 64
PIJP10M064 DDR3_DQS3_P
DDR_D2 i DRAM_D19 DM3 DQS3_P
DDR3_D18 PIU1000Y7
Y7 AB15 DDR3_RAS 65 66
DDR_D2 i DRAM_D20 DRAM_RAS PIU1000AB15 i DDR_CTL NLDDR30D26 PIJP10M065 VSS VSS PIJP10M066
NLDDR30D30
DDR3_D23 PIU1000Y8
Y8 AE16 DDR3_CAS DDR3_D26 67 68 DDR3_D30
DDR_D2 i DRAM_D21 DRAM_CAS PIU1000AE16 i DDR_CTL NLDDR30D27
PIJP10M067
DQ26 DQ30 PIJP10M068
NLDDR30D31
DDR3_D17 PIU1000AC8
AC8 AB16 DDR3_WE DDR3_D27 69 70 DDR3_D31
DDR_D2 i DRAM_D22 DRAM_SDWE PIU1000AB16 i DDR_CTL PIJP10M069
DQ27 DQ31 PIJP10M070
DDR3_D20 PIU1000AA9
AA9 71 72
DDR_D2 i DRAM_D23 PIJP10M071 VSS VSS PIJP10M072
DDR3_DQS2_PPIU1000AD8
AD8
DRAM_SDQS2 NLDDR30CKE0 NLDDR30CKE1
DDR3_DQS2_N AE8 Y11 DDR3_CKE0 P1.5V_DDR_SW3 DDR3_CKE0 73 74 DDR3_CKE1 P1.5V_DDR_SW3
PIU1000AE8 DRAM_SDQS2_B DRAM_SDCKE0 PIU1000Y11 i DDR_CTL PIJP10M073 CKE0 CKE1 PIJP10M074
DDR3_DM2PIU1000AB8
AB8 AA11 DDR3_CKE1 GND 75 76 GND
DDR_D2 i DRAM_DQM2 DRAM_SDCKE1 PIU1000AA11 i DDR_CTL PIJP10M075 VDD VDD PIJP10M076
78
PIJP10M078 NLDDR30A15
DDR3_A15
A15
DDR_D3 i
DDR3_D24 PIU1000AE9
AE9
DRAM_D24
AC16 DDR3_ODT0
DRAM_SDODT0 PIU1000AC16 i DDR_CTL
NLDDR30BA2
DDR3_BA2 79
PIJP10M079 BA2 A14
80
PIJP10M080 NLDDR30A14
DDR3_A14
DDR3_D27 PIU1000Y10
Y10 AB17 DDR3_ODT1 81 82
DDR_D3 i DRAM_D25 DRAM_SDODT1 PIU1000AB17 i DDR_CTL NLDDR30A12 PIJP10M081 VDD VDD PIJP10M082
NLDDR30A11
DDR3_D25 PIU1000AE11
AE11 DDR3_A12 83 84 DDR3_A11
DDR_D3 i DRAM_D26 NLDDR30A9
PIJP10M083
A12 A11 PIJP10M084
NLDDR30A7
DDR3_D26 PIU1000AB11
AB11 DDR3_A9 85 86 DDR3_A7
DDR_D3 i DRAM_D27 PIJP10M085
A9 A7 PIJP10M086
DDR3_D31 PIU1000AC9
AC9 87 88
DDR_D3 i DRAM_D28 NLDDR30A8
PIJP10M087 VDD VDD PIJP10M088
NLDDR30A6
DDR3_D29 PIU1000AD9
AD9 DDR3_A8 89 90 DDR3_A6
DDR_D3 i DRAM_D29 NLDDR30A5
PIJP10M089 A8 A6 PIJP10M090
NLDDR30A4
DDR3_D28 PIU1000AD11
AD11 Y6 DDR3_RESET DDR3_A5 91 92 DDR3_A4
DDR_D3 i DRAM_D30 DRAM_RESET PIU1000Y6 i DDR_CTL PIJP10M091 A5 A4 PIJP10M092
DDR3_D30 PIU1000AC11
AC11 93 94
DDR_D3 i DRAM_D31 COR10M
R10M PIJP10M093 VDD VDD PIJP10M094
DDR3_DQS3_PPIU1000AC10
AC10 NLDDR30A3
DDR3_A3 95 96 NLDDR30A2
DDR3_A2
DRAM_SDQS3 PIR10M01 PIR10M02 PIJP10M095 A3 A2 PIJP10M096
DDR3_DQS3_N AB10
PIU1000AB10 DRAM_SDQS3_B 10k, 1% NLDDR30A1
DDR3_A1 97
PIJP10M097 A1 A0
98
PIJP10M098 NLDDR30A0
DDR3_A0
DDR3_DM3PIU1000AE10
AE10 99 100
DDR_D3 i DRAM_DQM3 NLDDR30CK00P PIJP10M099 VDD VDD PIJP10M0100
NLDDR30CK10P
GND DDR3_CK0_P 101 102 DDR3_CK1_P
C NLDDR30CK00N PIJP10M0101 CK0_P CK1_P PIJP10M0102
NLDDR30CK10N C
2.2pF, NP0 (DNP) 2.2pF, NP0 (DNP)
DDR3_D32 PIU1000AA17
AA17 AD15DDR3_CK0_P DDR3_CK0_N 103 104 DDR3_CK1_N
DDR_D4 i DRAM_D32 DRAM_SDCLK_0 PIU1000AD15
i DDR_CLK0 PIJP10M0103
CK0_N CK1_N PIJP10M0104
DDR_D4 i
DDR3_D38 PIU1000AA18
AA18
DRAM_D33 DRAM_SDCLK_0_B
AE15 DDR3_CK0_N
PIU1000AE15
PIC12M01 105
PIJP10M0105 VDD VDD
106
PIJP10M0106
DDR3_D39 PIU1000AC18
AC18 COC12M
C12M NLDDR30A10
DDR3_A10 107 108 NLDDR30BA1
DDR3_BA1
DDR_D4 i DRAM_D34 PIJP10M0107 A10 BA1 PIJP10M0108
DDR_D4 i
DDR3_D33 PIU1000AE19
AE19
DRAM_D35
PIC12M02 i DDR_CLK0
NLDDR30BA0
DDR3_BA0 109
PIJP10M0109 BA0 RAS_N
110
PIJP10M0110
NLDDR30RAS
DDR3_RAS
DDR3_D36 PIU1000Y17
Y17 111 112
DDR_D4 i DRAM_D36 PIJP10M0111 VDD VDD PIJP10M0112
DDR_D4
DDR3_D34 PIU1000Y18
Y18 NLDDR30WE
DDR3_WE 113 114 NLDDR30CS0
DDR3_CS0
i DRAM_D37 PIJP10M0113 WE_N S0_N PIJP10M0114
DDR_D4
DDR3_D37 PIU1000AB19
AB19 NLDDR30CAS
DDR3_CAS 115
PIJP10M0115 116
PIJP10M0116 NLDDR30ODT0
DDR3_ODT0
i DRAM_D38 CAS_N ODT0
DDR3_D35 PIU1000AC19
AC19 117 118
DDR_D4 i DRAM_D39 i DDR_CLK1 PIJP10M0117 VDD VDD PIJP10M0118
DDR3_DQS4_PPIU1000AD18
AD18
DRAM_SDQS4
PIC13M01 DDR3_A13
NLDDR30A13 119
PIJP10M0119 A13 ODT1
120
PIJP10M0120
DDR3_ODT1
NLDDR30ODT1
DDR3_DQS4_N AE18 AD14DDR3_CK1_P COC13M
C13M NLDDR30CS1
DDR3_CS1 121
PIU1000AE18
DRAM_SDQS4_B DRAM_SDCLK_1 PIU1000AD14 PIJP10M0121
S1_N
DDR_D4 i
DDR3_DM4PIU1000AB18
AB18
DRAM_DQM4 DRAM_SDCLK_1_B
AE14 DDR3_CK1_N
PIU1000AE14
PIC13M02 i DDR_CLK1
123
PIJP10M0123 VDD VDD
124
PIJP10M0124
P0.75V_REFDDR
0.01uF, 10V, X5R, 10%
0.22uF, 6.3V, X5R 10%
126
VREFCA PIJP10M0126
DDR_D5 i
DDR3_D40 PIU1000Y19
Y19
DRAM_D40
127 PIJP10M0127 VSS VSS
128
PIJP10M0128
PIC14M01 PIC15M01
DDR3_D41 PIU1000AB20
AB20 NLDDR30D32
DDR3_D32 129 130 NLDDR30D36
DDR3_D36 C14M
COC14M C15M
COC15M
DDR_D5 i DRAM_D41 PIJP10M0129 DQ32 DQ36 PIJP10M0130
PIC14M02 PIC15M02
DDR_D5
DDR3_D42 PIU1000AB21
AB21 NLDDR30D33
DDR3_D33 131 132 NLDDR30D37
DDR3_D37
i DRAM_D42 PIJP10M0131 DQ33 DQ37 PIJP10M0132
DDR3_D44 PIU1000AD21
AD21 133 134
DDR_D5 i DRAM_D43 PIJP10M0133 VSS VSS PIJP10M0134
DDR_D5 i
DDR3_D45 PIU1000Y20
Y20
DRAM_D44
NLDDR30DQS40N
DDR3_DQS4_N 135
PIJP10M0135 DQS4_N DM4
136
PIJP10M0136 NLDDR30DM4
DDR3_DM4
DDR3_D43 PIU1000AA20
AA20 DDR3_DQS4_P
NLDDR30DQS40P 137 138 GND
DDR_D5 i DRAM_D45 PIJP10M0137 DQS4_P VSS PIJP10M0138
NLDDR30D38
DDR3_D47 PIU1000AE21
AE21 139 140 DDR3_D38
DDR_D5 i DRAM_D46 NLDDR30D34 PIJP10M0139 VSS DQ38 PIJP10M0140
NLDDR30D39
DDR3_D46 PIU1000AC21
AC21 DDR3_D34 141 142 DDR3_D39
DDR_D5 i DRAM_D47 NLDDR30D35
PIJP10M0141 DQ34 DQ39 PIJP10M0142
DDR3_DQS5_PPIU1000AD20
AD20 DDR3_D35 143 144
DRAM_SDQS5 PIJP10M0143 DQ35 VSS PIJP10M0144
NLDDR30D44
DDR3_DQS5_N AE20 145 146 DDR3_D44
PIU1000AE20 DRAM_SDQS5_B NLDDR30D40
PIJP10M0145 VSS DQ44 PIJP10M0146
NLDDR30D45
DDR3_DM5PIU1000AC20
AC20 DDR3_D40 147 148 DDR3_D45
DDR_D5 i DRAM_DQM5 PIJP10M0147 DQ40 DQ45 PIJP10M0148
P0.75V_REFDDR NLDDR30D41
DDR3_D41 149 150
PIJP10M0149 DQ41 VSS PIJP10M0150
0.1uF, 6.3V, X5R
DDR_D6
D i
DDR3_D48 PIU1000AC22
AC22
DRAM_D48 DRAM_VREF
AC2
PIU1000AC2
151
PIJP10M0151 VSS DQS5_N
152
PIJP10M0152
NLDDR30DQS50N
DDR3_DQS5_N
D
DDR_D6 i
DDR3_D54 PIU1000AE22
AE22
DRAM_D49
PIC16M01 DDR3_DM5
NLDDR30DM5 153
PIJP10M0153 DM5 DQS5_P
154
PIJP10M0154 DDR3_DQS5_P
NLDDR30DQS50P
DDR3_D50 PIU1000AE24
AE24 COC16M
C16M 155 156
DDR_D6 i DRAM_D50 PIJP10M0155 VSS VSS PIJP10M0156
DDR_D6 i
DDR3_D52 PIU1000AC24
AC24
DRAM_D51
PIC16M02 DDR3_D42
NLDDR30D42 157
PIJP10M0157 DQ42 DQ46
158
PIJP10M0158
DDR3_D46
NLDDR30D46
DDR3_D53 PIU1000AB22
AB22 NLDDR30D43
DDR3_D43 159 160 NLDDR30D47
DDR3_D47
DDR_D6 i DRAM_D52 PIJP10M0159 DQ43 DQ47 PIJP10M0160
DDR3_D51 PIU1000AC23
AC23 AE17NLDDR30ZQPAD
DDR3_ZQPAD 161 162
DDR_D6 i DRAM_D53 ZQPAD PIU1000AE17 PIJP10M0161 VSS VSS PIJP10M0162
DDR_D6 i
DDR3_D49 PIU1000AD25
AD25
DRAM_D54
PIR1 M01 GND NLDDR30D48
DDR3_D48 163
PIJP10M0163 DQ48 DQ52
164
PIJP10M0164
NLDDR30D52
DDR3_D52
DDR3_D55 PIU1000AC25
AC25 R11M
COR11M NLDDR30D49
DDR3_D49 165 166 NLDDR30D53
DDR3_D53
DDR_D6 i DRAM_D55 240, 1%
PIJP10M0165 DQ49 DQ53 PIJP10M0166
DDR3_DQS6_PPIU1000AD23
AD23 R18 167 168
DRAM_SDQS6 NVCC_DRAM_1 PIU1000R18 PIR1 M02 PIJP10M0167 VSS VSS PIJP10M0168
DDR3_DQS6_N AE23
PIU1000AE23 DRAM_SDQS6_B
T18
NVCC_DRAM_2 PIU1000T18
NLDDR30DQS60N
DDR3_DQS6_N 169
PIJP10M0169 DQS6_N DM6
170
PIJP10M0170
NLDDR30DM6
DDR3_DM6
DDR3_DM6 AD24 U18 DDR3_DQS6_P
NLDDR30DQS60P 171 172
DDR_D6 i PIU1000AD24 DRAM_DQM6 NVCC_DRAM_3 PIU1000U18 PIJP10M0171 DQS6_P VSS PIJP10M0172
V10 173 174 DDR3_D54
NLDDR30D54
NVCC_DRAM_4 PIU1000V10 PIJP10M0173 VSS DQ54 PIJP10M0174
DDR3_D56 PIU1000AB25
AB25 V11 GND DDR3_D50
NLDDR30D50 175 176 DDR3_D55
NLDDR30D55
DDR_D7 i DRAM_D56 NVCC_DRAM_5 PIU1000V11 NLDDR30D51 PIJP10M0175 DQ50 DQ55 PIJP10M0176
DDR3_D57 PIU1000AA21
AA21 V12 DDR3_D51 177 178
DDR_D7 i DRAM_D57 NVCC_DRAM_6 PIU1000V12 PIJP10M0177 DQ51 VSS PIJP10M0178
NLDDR30D60
DDR3_D58 PIU1000Y25
Y25 V13 179 180 DDR3_D60
DDR_D7 i DRAM_D58 NVCC_DRAM_7 PIU1000V13 NLDDR30D56
PIJP10M0179 VSS DQ60 PIJP10M0180
NLDDR30D61
DDR3_D61 PIU1000Y22
Y22 V14 DDR3_D56 181 182 DDR3_D61
DDR_D7 i DRAM_D59 NVCC_DRAM_8 PIU1000V14 PIJP10M0181 DQ56 DQ61 PIJP10M0182
DDR3_D60 PIU1000AB23
AB23 V15 NLDDR30D57
DDR3_D57 183 184
DDR_D7 i DRAM_D60 NVCC_DRAM_9 PIU1000V15 PIJP10M0183 DQ57 VSS PIJP10M0184
DDR_D7
DDR3_D59 PIU1000AA23
AA23 V16 185 186 NLDDR30DQS70N
DDR3_DQS7_N P3.3V_DELAYED
i DRAM_D61 NVCC_DRAM_10 PIU1000V16 PIJP10M0185 VSS DQS7_N PIJP10M0186
DDR_D7 i
DDR3_D63 PIU1000Y23
Y23
DRAM_D62
V17
NVCC_DRAM_11 PIU1000V17
NLDDR30DM7
DDR3_DM7 187
PIJP10M0187 DM7 DQS7_P
188
PIJP10M0188
NLDDR30DQS70P
DDR3_DQS7_P
DDR_D7 i
DDR3_D62 PIU1000W25
W25
DRAM_D63
V18
NVCC_DRAM_12 PIU1000V18
P1.5V_DDR_SW3 189
PIJP10M0189 VSS VSS
190
PIJP10M0190
PIR12M01
DDR3_DQS7_PPIU1000AA25
AA25 V9 DDR3_D58
NLDDR30D58 191 192 DDR3_D62
NLDDR30D62 COR12M
R12M
DRAM_SDQS7 NVCC_DRAM_13 PIU1000V9 PIJP10M0191 DQ58 DQ62 PIJP10M0192
10k, 1%
DDR3_DQS7_N AA24 DDR3_D59
NLDDR30D59 193 194 DDR3_D63
NLDDR30D63
PIU1000AA24 DRAM_SDQS7_B PIJP10M0193 DQ59 DQ63 PIJP10M0194
DDR_D7 i
DDR3_DM7 Y21
PIU1000Y21 DRAM_DQM7
195
PIJP10M0195 VSS VSS
196
PIJP10M0196
PIR12M02
P3.3V_DELAYED PIJP10M0197
197 198 NLDDR30EVENT0N
DDR3_EVENT_N
SA0 EVENT_N PIJP10M0198
0.22uF, 6.3V, X5R 10%
address 0xA0
199 200 NLSMB0SDA
SMB_SDA
PIJP10M0199 VDDSPD SDA PIJP10M0200
E
201
PIJP10M0201
PIC17M01 SA1 SCL
202
PIJP10M0202
NLSMB0SCL
SMB_SCL P0.75V_DDR3_VTT
E
0.22uF, 6.3V, X5R 10%
0.01uF, 10V, X5R, 10%
47uF, 6.3V, 20% X5R (CL31A476MQHNNNE)
C17M
COC17M 203 204
PIJP10M0203 VTT VTT PIJP10M0204
PIC17M02 PIC18M01 COC18M
PIC19M01 COC19M
PIC20M 1 COC20M
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.01uF, 10V, X5R, 10%
0.01uF, 10V, X5R, 10%
0.01uF, 10V, X5R, 10%
22uF, 6.3V, X5R, 20%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
0.22uF, 6.3V, X5R 10%
DDR3 SODIMM socket, reverse pinout C18M C19M C20M
PIC21M01 PIC2 M01 PIC23M01 PIC24M01 PIC25M01 PIC26M01 PIC27M01 PIC28M01 PIC29M01 PIC30M01 PIC31M01 PIC18M02 PIC19M02 PIC20M 2
COC21M
C21M COC22M
C22M COC23M
C23M COC24M
C24M COC25M
C25M COC26M
C26M COC27M
C27M COC28M
C28M COC29M
C29M COC30M
C30M COC31M
C31M GND
PIC21M02 PIC2 M02 PIC23M02 PIC24M02 PIC25M02 PIC26M02 PIC27M02 PIC28M02 PIC29M02 PIC30M02 PIC31M02
GND GND
GND P1.5V_DDR_SW3
GND
10% 6.3V, X5R 10%
10% 6.3V, X5R 10%
10% 6.3V, X5R 10%
10% 6.3V, X5R 10%
10% 6.3V, X5R 10%
10% 6.3V, X5R 10%
10% 6.3V, X5R 10%
10% 6.3V, X5R 10%
PIC32M01 COC32M
PIC3 M01 COC33M
PIC34M01 COC34M
PIC35M01 COC35M
PIC36M01 COC36M
PIC37M01 COC37M
PIC38M01 COC38M
PIC39M01 COC39M
C32M C33M C34M C35M C36M C37M C38M C39M
Option: SW4 power supply instead of SW3 to reduce VTT power: PIC32M02 PIC3 M02 PIC34M02 PIC35M02 PIC36M02 PIC37M02 PIC38M02 PIC39M02
SW4 is unused, so reprogram in BSP to 1.1V
0.1uF, 6.3V, X5R
(Approx 0.3-0.4V min drop-out @ 0.5A, 100C))
0.01uF, 10V, X5R, 0.22uF,
0.01uF, 10V, X5R, 0.22uF,
0.01uF, 10V, X5R, 0.22uF,
0.01uF, 10V, X5R, 0.22uF,
0.01uF, 10V, X5R, 0.22uF,
0.01uF, 10V, X5R, 0.22uF,
0.01uF, 10V, X5R, 0.22uF,
0.01uF, 10V, X5R, 0.22uF,
GND
47uF, 6.3V, 20% X5R (CL31A476MQHNNNE)
47uF, 6.3V, 20% X5R (CL31A476MQHNNNE)
47uF, 6.3V, 20% X5R (CL31A476MQHNNNE)
1.0uF, 25V, 20% X5R
1.0uF, 25V, 20% X5R
PIC40M 1
P0.75V_REFDDR C40M
COC40M PIC41M01 PIC42M01 PIC43M01 PIC4 M01 PIC45M01 PIC46M01 PIC47M01 PIC48M01 PIC49M01 PIC50M01 PIC51M01 PIC52M01 PIC53M01
P1.5V_DDR_SW3 P1.8V_SW4 PIC40M 2 C41M
COC41M C42M
COC42M C43M
COC43M C44M
COC44M C45M
COC45M C46M
COC46M C47M
COC47M C48M
COC48M C49M
COC49M C50M
COC50M C51M
COC51M C52M
COC52M C53M
COC53M
PIC41M02 PIC42M02 PIC43M02 PIC4 M02 PIC45M02 PIC46M02 PIC47M02 PIC48M02 PIC49M02 PIC50M02 PIC51M02 PIC52M02 PIC53M02
PIR15M01COR15M PIR16M01COR16M
0 ohm, 0805
R15M R16M GND
0 ohm, 0805 (DNP) U10M
COU10M GND
PIR15M02 PIR16M02 PIU10M01 VIN
1 9
GND PIU10M09
2 P5.0V
F PIU10M02 GND F
P0.75V_DDR3_VTT 3 6 VTT_VCNTLPIR13M02COR13M
NLVTT0VCNTL R13M
PIU10M03 REFEN VCNTL PIU10M06 PIR13M01
Copyright 2014 Andrew "bunnie" Huang
10uF, 10V, X5R, 20%
10uF, 10V, X5R, 20%
4
PIU10M04 VOUT PIC54M01 2.2 ohm, 5%
PIC5 M01 PIR14M01 PIC56M01 C54M
COC54M Title
C55M
COC55M R14M
COR14M C56M
COC56M RT9045GSP PIC54M02 1.0uF, 25V, 20% X5R
1k, 1%
PIC5 M02 PIC56M02 Novena PVT2-A
PIR14M02 Size Number Revision
GND
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 B
GND Date: 7/5/2014 Sheet of
File: F:\largework\..\03cpu_sodimm.SchDoc Drawn By:
1 2 3 4
1 2 3 4 5 6
POR default = 1.8V
POR default = 1.5V for low-voltage eMMC
P1.2V_VGEN1 P1.5V_VGEN2 P1.8V_VGEN3 P1.8V_VGEN4 P1.8V_VGEN4
4.7uF, 10V, X5R, 10%
4.7uF, 10V, X5R, 10%
4.7uF, 10V, X5R, 10%
4.7uF, 10V, X5R, 10%
P3.0V_VDDHIGH_SW2
PIC10P01 PIC1 P01 PIC12P01 PIC13P01
0.1uF, 6.3V, X5R
POR default = 2.5V POR default = 2.8V
PIC14P01 COC10P
C10P COC11P
C11P COC12P
C12P COC13P P2.5V_VGEN5 P2.8V_VGEN6
C13P
PIC10P02 PIC1 P02 PIC12P02 PIC13P02
COC14P
PID10P1
4.7uF, 10V, X5R, 10%
4.7uF, 10V, X5R, 10%
C14P
1
PIC14P02 PIC15P01 PIC16P01
APT1608EC red
P3.3V_DELAYED COC15P
C15P COC16P
C16P COD10P
D10P
PIC15P02 PIC16P02 PID10P 2
0.1uF, 6.3V, X5R
A COU200A
U200A GND GND GND GND power LED A
2
PIC17P01 GND 17
PIU200017 VIN1 VGEN1
16
PIU200016
COC17P
C17P P3.3V 27 18
PIU200027 VIN2 VGEN2 PIU200018
PIC17P02 PIR10P02
0.1uF, 6.3V, X5R
40
PIU200040 26
PIU200026 GND GND
PIC18P01 P0.75V_REFDDR VIN3 VGEN3 COR10P
R10P
28
PIU200028
COC18P VGEN4
1.0uF, 25V, 20% X5R
C18P 31 39 49.9, 1%
PIC18P02 PIC19P01 PIU200031 VREFDDR VGEN5 PIU200039
PIR10P01
GND P1.5V_DDR_SW3 41
VGEN6 PIU200041
X5R 6.3V, X5R
COC19P
C19P 30 P3.3V_LICELL P3.3V
PIC19P02 PIC20P01 PIU200030 VINREFDDR COR20P
R20P
42
COC20P
C20P LICELL PIU200042
PIR19P02 PIR20P01 PIR20P02
GND 29 43 1k, 1% (DNP) GND
PIU200029 VHALF VSNVS PIU200043
PIC20P 2 COR19P
0.1uF, 6.3V, X5R
POR default = 3.0V R19P
PIC2 P01 1k, 1% (DNP)
0.1uF,
GND MMPF0100NPAEP P3.0V_STBY
PIC23P01 COC22P PIR19P01
0.1uF, 6.3V, X5R
C22P
COC23P PIC24P01 PIC2 P02
0.1uF, 6.3V,
C23P
PIC23P02 COC24P
C24P
PIBT10P1
1
PIC24P02 P3.3V
GND COBT10P
BT10P
GND ML-621S/DN (DNP) PIR21P02
PIBT10P2
4.7uF, 10V, X5R, 10%
GND COR21P
R21P
2
1k, 1%
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PIR21P01
4.7uF, 10V, X5R, 10%
P3.3V COC61P
C61P
0.1uF, 6.3V, X5R
4.7uF, 10V, X5R, 10%
4.7uF, 10V, X5R, 10%
GND PIC61P01 PIC61P02
PIC54P01 PIC5 P01 PIC56P01 PIC25P01 PIC26P01 PIC27P01
Abracon ABS06-32.768KHZ-T 12.5pF CL
P3.3V
Must configure CL = 12.5pF via I2C!
B COC54P
C54P COC55P COC56P COC25P COC26P COC27P B
0.1uF, 6.3V, X5R
4.7uF, 10V, X5R, 10%
4.7uF, 10V, X5R, 10%
POR default = 1.375V C55P C56P C25P C26P C27P COU10P
U10P 4.7uF, 10V, X5R, 10%
VCC_1.2V_SW1AB PIC54P02 PIC5 P02 PIC56P02 PIC25P02 PIC26P02 PIC27P02 VCC_1.2V_SW1AB PIC28P01 PIC29P01 PIC30P01 PIC31P01 PIC57P01 PIY10P 1 COY10P 1
PIU10P01 OSCI
8
VDD PIU10P08
1
COC28P COC29P COC30P COC31P COC57P
22uF, 6.3V, X5R, 20% 22uF, 6.3V, X5R, 20%
22uF, 6.3V, X5R, 20% 22uF, 6.3V, X5R, 20%
22uF, 6.3V, X5R, 20%
22uF, 6.3V, X5R, 20%
C28P C29P C30P C31P C57P 2
PIU10P02 7 GND
OSCO INT1/CLK PIU10P07
PIC32P01 PIC3 P01 PIC34P01 PIC35P01 PIC28P02 PIC29P02 PIC30P02 PIC31P02 PIC57P02 Y10P 3
PIU10P03 VBAT
6
SCL PIU10P06
NLSMB0SCL
SMB_SCL
COC32P COC33P COC34P COC35P
C32P C33P C34P C35P GND COU200B
U200B P1.5V_DDR_SW3
PIY10P 2 4
PIU10P04 VSS
5
SDA PIU10P05
NLSMB0SDA
SMB_SDA
2
PIC32P02 PIC3 P02 PIC34P02 PIC35P02 6
PIU20006 SW1FB SW3AFB
38
PIU200038 COL10P
L10P POR default = 1.5V
COL11P
L11P 7
PIU20007 SW1AIN
37 GND P1.5V_DDR_SW3 PCF8523T/1
SW3AIN PIU200037
22uF, 6.3V, X5R, 20%
22uF, 6.3V, X5R, 20%
22uF, 6.3V, X5R, 20%
22uF, 6.3V, X5R, 20%
8
PIU20008 SW1ALX
36
SW3ALX PIU200036 PIL10P01 PIL10P02
PIC36P01 PIC37P01 PIC38P01 PIC39P01
GND 9
PIU20009 SW1BLX SW3BLX
35 1uH LPS4018-102 PIBT1P01 Device address = 0xD0/0xD1
1
PIL11P01 PIL11P02 PIU200035
POR default = 1.375V COL12P 1uH LPS4018-102 10 34 COC36P
C36P COC37P
C37P COC38P
C38P COC39P
C39P
L12P PIU200010 SW1BIN SW3BIN PIU200034
VDD_SOC_IN_SW1C
SW3BFB
33
PIU200033
PIC36P02 PIC37P02 PIC38P02 PIC39P02 COBT11P
BT11P
11 BR1225A/FAN
PIL12P01 PIL12P02 PIU200011 SW1CLX
PIC40P01 PIC41P01 1uH LPS4018-102 VDD_SOC_IN_SW1C 12
PIU200012 SW1CIN SW3VSSSSNS
32
PIU200032
PIBT1P02
2
COC40P
C40P COC41P
C41P 13 GND GND
PIU200013 SW1CFB
PIC40P02 PIC41P02 19
SW4FB PIU200019 COL13P
L13P POR default = 1.8V
COL14P
L14P 14
PIU200014 20 P1.8V_SW4
SW1VSSSNS SW4IN PIU200020
22uF, 6.3V, X5R, 20%
P3.0V_VDDHIGH_SW2 21 GND
SW4LX PIU200021 PIL13P01 PIL13P02
PIC42P01
22uF, 6.3V, X5R, 20%
22uF, 6.3V, X5R, 20%
GND POR default = 3.0V PIU200022
22 1uH LPS4018-102 P3.0V_STBY
PIC43P01 PIC4 P01 PIL14P01 PIL14P02 SW2LX COC42P
C42P
23
GNDREF1
1uH LPS4018-102 PIU200023 SW2IN_1
COC43P
C43P COC44P
C44P 24 46 PIC42P02 PIR1 P02
EPGND
0.1uF, 6.3V, X5R
PIU200024 SW2IN_2 SWBSTLX PIU200046
PIC43P02 PIC4 P02 P3.0V_VDDHIGH_SW2 45 P5.0V_SWBST
PIL15P01 PID1P01 COR11P
R11P
2.2uH LPS4018-222
SWBSTIN PIU200045
10k, 1%
P3.3V 25
PIU200025 SW2FB
44
SWBSTFB PIU200044
COL15P COD11P
4.7uF, 10V, X5R, 10%
L15P D11P GND VCOREDIG PIR1 P01
PIC45P01 PIC58P01
1.0uF, 25V, 20% X5R
1.0uF, 25V, 20% X5R
PID1 P02
PMIC_PWRON
MBR140SFT
GND MMPF0100NPAEP
PIU20 57 PIU20 15
NLPMIC0WRON
C C
57
15
COC45P
C45P COC58P
C58P PIC46P01 PIC47P01
0.1uF, 6.3V, X5R
PIC45P02 PIC58P02 COC46P
C46P COC47P
C47P COR12P
R12P NLPMIC0ON0REQ
PMIC_ON_REQ
PIR12P01 PIR12P02
P3.3V
PIL15P02 P5.0V_SWBST PIC46P02 PIC47P02 1k, 1%
10uF, 10V, X5R, 20%
PIC59P01 PIC48P01
10uF, 10V, X5R, 20%
GND GND GND P3.3V COU200C
U200C P3.0V_STBY
COC59P
C59P COC48P
C48P PIC49P01 GND GND 50
PIU200050 VIN PWRON
56
PIU200056
PIC59P02 PIC48P02 COC49P
C49P COC50P
C50P 51
PIU200051 VCOREDIG RESETBMCU
3
PIU20003
NLRESETBMCU
RESETBMCU PIR13P02 P3.3V_DELAYED
PIC49P02 PIR15P02
10k, 1%
52 4 NLPMIC0STBY0REQ R13P
PMIC_STBY_REQ COR13P
PIC50P02 PIC50P01 PIU200052 VCOREREF STANDBY PIU20004
COR15P
R15P COC51P
C51P 68k, 1% PIR14P02
GND GND PIC51P02
0.1uF, 6.3V, X5R49
PIU200049 VCORE
PIC51P01
2
SDWNB PIU20002
PMIC_SDWNB
NLPMIC0SDWNB COR14P
R14P PIR13P01
GND PIR15P01 48
PIU200048 GNDREF
68k, 1%
1.0uF, 25V, 20% X5R 1
INTB PIU20001 PIR14P01 PMIC_INT_B
NLPMIC0INT0B
NLVDDOTP
VDDOTP 47
PIU200047 VDDOTP
PIR16P02 P3.3V 55
PIU200055 VDDIO
COR16P
R16P PIR17P02
0 ohm (DNP) COR17P
R17P NLDDC0SCL
DDC_SCL 54
PIU200054 SCL
PIR16P01 0 ohm (DNP) DDC_SDA
NLDDC0SDA 53
PIU200053 SDA ICTEST
5
PIU20005
PIR17P01 PIR18P02
MMPF0100NPAEP COR18P
R18P
PIC60P02
10uF, 10V, X5R, 20% (DNP)
10uF, 10V, X5R, 20% (DNP)
+8V on J10P to program OTP COJ10P
J10P GND 0 ohm
Remove R15P, populate R17P, C52P, C53P to program
1 PIJ10P01
COC60P
C60P PIR18P01
Remove R15P, R17P, populate R16P, C52P, C53P to boot from fuses PIC52P01 COC52P
PIC53P01 COC53P
PIC60P 1 0.1uF, 6.3V, X5R
test point (DNP) C52P C53P
D PIC52P02 PIC53P02 GND D
GND Copyright 2014 Andrew "bunnie" Huang
Title
GND
Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 B
Date: 7/5/2014 Sheet of
File: F:\largework\..\04pwr_pmic.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
Note: Do not use JP10N power plug when plugged into charger/battery board via J10N!!! Note: use R31N only in fixed installations. Remove if used with battery (rely on battery MCU to guarantee input cap discharge)
COJP10N
JP10N 2 GND
22uF, 25V, X5R, 10% (DNP)
22uF, 25V, X5R, 10% (DNP)
PIJP10N02
3 COD10N
D10N
PIJP10N03
NLRAW0PWR NLBATT0PWR DC power + battery -> 5V regulator
0.1uF, 25V, X5R
PIJP10N011 RAW_PWR PID10N01 PID10N02 BATT_PWR
PIC10N01 PIR31N02
PID1N02
22uF, 25V, X5R, 10%
22uF, 25V, X5R, 10%
2.1mm x 5.5mm DC jack COC10N COR31N
C10N SSB44-E3/52T R31N
COD11N
D11N PIC10N 2 PIC14N01 PIC15N01 PIC16N01 PIC17N01
1.0uF, 25V, 20% X5R
2.2k, 1%
12V @ 3A PESD24VL1BA PIR31N01 COD12N COC14N COC15N COC16N COC17N
0.1uF, 25V, X5R
0.1uF, 25V, X5R
A NLREG5V0BST
REG5V_BST D12N C14N C15N C16N C17N A
PIC1 N01 PIC12N01 PIC13N01 PID12N02 PID12N01 PIC14N02 PIC15N02 PIC16N02 PIC17N02
7V-19V nominal range GND COC11N
C11N COC12N
C12N COC13N
C13N COU10N
U10N
6V-18V battery header PIC1 N02 PIC12N02 PIC13N02
2.5A typ max 3A peak @ 12V PID1 N01 GND BAT54T1G
1
PIU10N01
S
D
D
9
PIU10N09
8
PIU10N08
Absolute max rating is 25V Compatible with: COU11N
U11N 2
PIU10N02 SND
7
PIU10N07
GND
GND 1 8 8.06 ohm, 1% 3 6 COL10NB
L10NB
PIU11N01 VCC BST PIU11N08 PIU10N03 S D PIU10N06
GND 2-cell Li-Ion 2
PIU11N02 COMP HSDR
7 REG5V_HSDR PIR10N01COR10N
NLREG5V0HSDR R10N 4
PIU10N04 G
5 place within MSS1260 pad
COJ10N PIU11N07
NLREG5V0VSW PIR10N02 D PIU10N05
J10N 3
PIU11N03 FB
6 REG5V_VSW
COM10N 3-cell Li-Ion (preferred) VSW PIU11N06 PIL10NB01 PIL10NB02
M10N 1 4 5 NTMFS4841NT1G
22uF, 10V, X5R, 20% (DNP)
+12V PIJ10N01 PIU11N04 GND LSDR PIU11N05 COR11N
R11N 3.3uH, XAL7030-322MEC
2 COL10N
L10N
1 PIM10N01 +12V PIJ10N02
4-cell Li-Ion (preferred) NLREG5V0COMP
PIR11N02 PIR11N01
3 REG5V_COMP NCP3020B 10k, 1% P5.0V
+12V PIJ10N03
5V @ 7A max
22uF, 10V, X5R, 20%
22uF, 10V, X5R, 20%
22uF, 10V, X5R, 20%
330pF, X7R, 10%
M2 mounting hole 4
GND PIJ10N04
6-cell lead acid
PIL10N01 PIL10N02
PIC18N01 PIR12N02 PIR13N02
REG5V_LSDR
8.2 pF, NP0
COM11N
M11N 5
NLREG5V0LSDR COR12N 3.3uH, MSS1260-332NL (DNP)
OPT PIJ10N05
6 PIC19N01 COC18N
C18N GND COU12N
U12N R12N COR13N
R13N PIC20N01 PIC21N01 PIC2 N01 PIC23N01
1 PIM11N01 GND PIJ10N06
+5V
7
PIJ10N07 6 to 12 cell NiMH COC19N
C19N PIC18N02 D
9
PIU12N09
100, 1% 20 ohms, 1% COC20N
C20N COC21N
C21N COC22N
C22N COC23N
C23N
M2 mounting hole
+5V
8
PIJ10N08
PIC19N02 1
PIU12N01 S D
8
PIU12N08
PIR12N01 PIR13N01 PIC20N02 PIC21N02 PIC2 N02 PIC23N02
PIR14N02 PIR15N02 PIR16N02
470pF, X7R, 10%
COM12N
M12N 9 2 7
+5V PIJ10N09
COR14N
R14N
PIU12N02 SND PIU12N07
PIC24N01 COR15N
R15N COR16N
R16N
10 3 6
1 PIM12N01 GND PIJ10N010
68k, 1% COR17N
R17N PIU12N03 S D PIU12N06
COC24N
C24N 63.4k, 1% 4.99k, 1%
11 4 5 GND
GND PIJ10N011 COR39N
R39N NLCHG0PWRSWITCH PIR14N01 COR18N
R18N PIR17N01 PIR17N02
PIR19N02 PIU12N04 G D PIU12N05
PIC24N02 PIR15N01 PIR16N01
M2 mounting hole 12 CHG_PWRSWITCH 0 ohm
COM13N GND PIJ10N012 PIR39N01 PIR39N02 PIR18N01 PIR18N02
COR19N
330pF, X7R, 10%
M13N 13 330, 1% 0 ohm R19N NTMFS4C35NT1G
+3.3V PIJ10N013
1 PIM13N01 +3.3V
14
PIJ10N014 COR22N
15k, 1% PIC25N01 P5.0V_DELAYED
B +3.3V
15
PIJ10N015
R22N
PIR22N01 PIR22N02
NLBATT0NRST
BATT_NRST PIR20N 2COR20N set OC trip @ ~15A PIR19N01 GND COC25N
C25N
B
M2 mounting hole 330, 1% R20N PIC25N02 COQ10N
Q10N
COM14N
M14N 16 0 ohm (DNP) 1 8
GND PIJ10N016 COR21N
R21N
PIQ10N01 S D PIQ10N08
1 PIM14N01 17
B+ PIJ10N017 PIR21N02 PIR21N01
COR23N
NLSMB0SCL
SMB_SCL PIR20N01 2
PIQ10N02 S
7
D PIQ10N07
18
B- PIJ10N018
R23N
330, 1% PIR23N01 PIR23N02
NLSMB0SDA
SMB_SDA GND PIR25N02 3
PIQ10N03 S
P 6
D PIQ10N06
COR25N PIC26N01 COR24N
R24N
DNP
M2 mounting hole 19 330, 1% NLREG5V0FBK
REG5V_FBK R25N 4 5
COM15N GND PIJ10N019 COR26N
R26N NLUART40TXD 8.66k, 1% COC26N
C26N
PIR24N02 PIR24N01 PIQ10N04 G D PIQ10N05
M15N 20 UART4_TXD GND 100k, 1%
A- PIJ10N020 PIR26N01 PIR26N02 COR27N
R27N NLUART40RXD PIR25N01 PIC26N02
21 330, 1% UART4_RXD Si4435DY
1 PIM15N01 A+ PIJ10N021 PIR27N01 PIR27N02
22 330, 1% COC27N
C27N
GND PIJ10N022
M2 mounting hole P3.3V_DELAYED PIC27N01 PIC27N02
MOLEX 87703-0001 male GND GND
COR28N
R28N PIR29N01
1.0uF, 25V, 20% X5R
PIR28N02 PIR28N01
COR29N
R29N
47k, 1%
GND 10k, 1%
COR30N
R30N PIR29N02
PIR30N02 PIR30N01
GND 47k, 1% PIQ1 N03
3
PID13N01 PID14N01 PID17N01 PID15N01 PID16N01
ESD5Z3.3T1
ESD5Z3.3T1
ESD5Z3.3T1
ESD5Z3.3T1
ESD5Z3.3T1
P2.5V_VGEN5
1
1
1
1
1
1 Q11N
COQ11N
PIQ11N01
COD13N
D13N COD14N
D14N COD17N
D17N COD15N
D15N COD16N
D16N 2N7002W
PIQ1 N02
2
PID13N02 PID14N02 PID17N02 PID15N02 PID16N02
2
2
2
2
2
GND
C C
GND
P5.0V
0.1uF, 25V, X5R
P5.0V
5V -> 3.3V regulator PIC3 N01
COU14N
U14N C33N
COC33N
PIR32N01 1 3 PIC3 N02
1k, 1%
RESETBMCU
COR32N
R32N
PIU14N01 GND VCC PIU14N03
PIR3 N02
10uF, 10V, X5R, 20% (DNP)
P3.3V_DELAYED NLRESETBMCU
RESETBMCU 2
COR33N
R33N PIR32N02 3.3V @ 5A max PIU14N02 RESET
COL11N
L11N GND
22uF, 10V, X5R, 20%
1k, 1% (DNP) U13N
COU13N P3.3V Q12N
COQ12N APX803-44-SAG-7 or RT9818CXXGVL 4.2V-4.38V setpoint
PIR3 N01 A1
PIU13N0A1 PGOOD
D3
SW PIU13N0D3 PIL11N01 PIL11N02
1
PIQ12N01 S D
8
PIQ12N08
allow PFM A2
PIU13N0A2 EN
D4
SW PIU13N0D4 0.60uH, XAL4020-601ME PIC28N01 PIC29N01 2
PIQ12N02 S
7
COR34N
R34N
PIR34N02 PIR34N01 B1
PIU13N0B1 MODE
E3
SW PIU13N0E3
COC28N
C28N COC29N
C29N 3
PIQ12N03 S
P DD
PIQ12N07
6
PIQ12N06
E4 PIC28N02 PIC29N02 COR35N
R35N 4 5
1k, 1% SW PIU13N0E4
COR36N
R36N PIR35N02 PIR35N01
PIQ12N04 G D PIQ12N05
E2 100k, 1%
PIU13N0E2 VIN
E1
PIU13N0E1 VIN FB
A3
PIU13N0A3
PIR36N02
100k, 1%
PIR36N01
C30N
COC30N Si4435DY GND Reset monitor, PFUZE reset is too short
22uF, 10V, X5R, 20%
GND P5.0V D2
PIU13N0D2 VIN
A4
VOUT PIU13N0A4 PIC30N01 PIC30N02
10nF, X7R, 50V 10%
D1
PIU13N0D1 VIN
GND
PIC31N01 PIC32N01 GND
C4
PIU13N0C4
1.0uF, 25V, 20% X5R
COC31N
C31N COC32N
C32N
GND
C3
PIU13N0C3
PIR37N02 3.33V nom PIR38N01
PIC31N02 PIC32N02 GND
C2
PIU13N0C2
COR37N
R37N COR38N
R38N
C1 31.6k, 1% 10k, 1%
GND PIU13N0C1
GND
B3
PIU13N0B3 PIR37N01 PIR38N02
D GND B4
AGND GND
B2
PIQ13N0 COQ13N Copyright 2014 Andrew "bunnie" Huang
D
3
PIU13N0B4 PIU13N0B2
P2.8V_VGEN6
FAN53541UCX GND 1 Q13N Title
PIQ13N01
2N7002W
Novena PVT2-A
PIQ13N02
2
Size Number Revision
GND GND
Copyrights: CC-BY-SA 3.0 B
GND Date: 7/5/2014 Sheet of
Patents: Apache 2.0 File: F:\largework\..\05pwr_input.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
A, B, and C correspond to labelled jumpers below
P3.3V_DELAYED
PIR13B02COR13B
A PIR14B02 PIR15B02 PIR16B02 R13B A
hard reset COR14B COR15B COR16B
10k, 1%
10k, 1%
COP0TAMPER
P_TAMPER R14B R15B R16B 100, 1%
1 PIP0TAMPER01 TL3342F160QG/TR TL3342F160QG/TR (DNP) 10k, 1% PIR13B01 COP10B
P10B
COU100A 2 PIP0TAMPER02
COSW10B
SW10B COSW11B
SW11B PIR14B01 PIR15B01 PIR16B01 PIP10B01
1 2 PIP10B02
U100A P3.3V NLJTAG0JRST
JTAG_JRST PIP10B03 PIP10B04
iMX6Q - MCIMX6Q5EYM12AC NLJTAG0JTDI 3 4
Male 2.54mm 2x1 right angle (DNP) DNP; CPU power state controlled by charger board JTAG_JTDI
PIR17B02 PIP10B05 5 6 PIP10B06
1
2
3
4
1
2
3
4
i.MX6Q - EIM CONT10B
NT10B NLJTAG0JTMS
JTAG_JTMS PIP10B07 7 8 PIP10B08
EIM_LBA
K22
PIU1000K22
NLEIM0LBA
EIM_LBA PISW10B1 PISW10B2 PISW10B3 PISW10B4 COR17B
R17B
10k, 1% PISW1B01 PISW1B02 PISW1B03 PISW1B04 NLJTAG0JTCK
JTAG_JTCK
NLJTAG0RTCKPIP10B09
JTAG_RTCK PIP10B011
9
11
10
12
PIP10B010
PIP10B012
EIM_OE
J24
PIU1000J24
NLEIM0OE
EIM_OE PIR17B01 Heat sink Advanced Thermal Solutions ATS-56001-C3-R0 NLJTAG0JTDO
JTAG_JTDO PIP10B013 13 14 PIP10B014
K20 NLEIM0RW
EIM_RW COC10B NLRESETBMCU R18B
RESETBMCU COR18B NLJTAG0NRST
JTAG_NRST
EIM_RW PIU1000K20 C10B PIR18B02 PIR18B01 PIP10B015 15 16 PIP10B016
COU100C
U100C
PIC10B02 PIC10B01 0 ohm
H24 NLEIM0CS0
EIM_CS0 iMX6Q - MCIMX6Q5EYM12AC Male 2.54mm 8x2 header (DNP
EIM_CS0 PIU1000H24
NLEIM0CS1
J23
PIU1000J23 EIM_CS1 GND 0.1uF, 25V, X5R (DNP) GND i.MX6Q - CONTROL
EIM_CS1
PIR19B02 PIR20B02
1k, 1%
H25
PIU1000H25
NLEIM0A16
EIM_A16 NLCPU0ONOFF
CPU_ONOFF D12
PIU1000D12 H5
PIU1000H5 P3.3V_DELAYED
EIM_A16 ONOFF JTAG_TCK COR19B COR20B
note: SMB pins on this sheet are only used for D/Q config
G24 NLEIM0A17
EIM_A17 P3.3V RESETBMCU C11 C3 R19B R20B
10k, 1% (DNP)
EIM_A17 PIU1000G24
NLEIM0A18 PIU1000C11 POR_B JTAG_TMS PIU1000C3
PIR2 B02 10k, 1%
J22 EIM_A18 G5
NVCC_EIM1
EIM_A18 JTAG_TDI
NVCC_JTAG
PIU1000J22 PIU1000G5
PIR23B02 PIR25B02 PIR19B01 PIR20B01
VDD_SNVS_IN
G25 NLUIM0DATA
UIM_DATA COP0USB
P_USB NLCPU0BOOTMODE0
CPU_BOOTMODE0 C12 G6 COR22B
R22B
EIM_A19 PIU1000G25 PIU1000C12 BOOT_MODE0 JTAG_TDO PIU1000G6
EIM_A20
H22
PIU1000H22
NLUIM0CLK
UIM_CLK COR23B
R23B 10k, 1% COR25B
R25B
2 PIP0USB02
NLCPU0BOOTMODE1
CPU_BOOTMODE1 F12
PIU1000F12 BOOT_MODE1 JTAG_TRSTB
C2
PIU1000C2
10k, 1% (DNP) GND
EIM_A21
H23
PIU1000H23
NLUIM0RESET
UIM_RESET A 1 PIP0USB01 JTAG_MOD
H6
PIU1000H6
PIR2 B01
EIM_A22
F24
PIU1000F24
NLPCIE0WDIS0N
PCIE_WDIS_N PIR23B01 PIR25B01 NLCPU0TEST0MODE
CPU_TEST_MODE E12
PIU1000E12 TEST_MODE
PIR26B02 GND
J21 NLUIM0PWRON
UIM_PWRON 2 pin 1.27mm male header COR26B
R26B
EIM_A23 PIU1000J21
4.7k, 1%
F25 NLHDMI0HPD0CPU
HDMI_HPD_CPU NLCPU0TAMPER
CPU_TAMPER E11
B EIM_A24 PIU1000F25 PIU1000E11 TAMPER B
PIR26B01
H19 NLCEC
CEC NLPMIC0STBY0REQ
PMIC_STBY_REQ F11 C7
100k, 1%
EIM_A25 PIU1000H19 PIU1000F11 PMIC_STBY_REQ CLK1_N PIU1000C7
PIR27B02 PIR28B02 PIQ10B 3 PIR29B02
10k, 1%
NLPMIC0ON0REQ
PMIC_ON_REQ D11
PIU1000D11 D7
PIU1000D7
PMIC_ON_REQ CLK1_P
3
COR27B COR28B COQ10B COR29B
10k, 1%
C25 NLDDC0SDA
DDC_SDA R27B R28B Q10B R29B GND
EIM_D16 PIU1000C25 NLI2C30SCL 2N7002W
F21 I2C3_SCL 1 header absent = boot from storage PCIE_CLK
EIM_D17 PIU1000F21 NLI2C30SDA PIR27B01 PIR28B01 PIQ10B01
PIR29B01 NLCLK20N
D24 I2C3_SDA header present = boot from USB C5 CLK2_N i
EIM_D18 PIU1000D24 CLK2_N PIU1000C5
G21
EIM_D19 PIU1000G21
NLEPIT10EPITO
EPIT1_EPITO
PIQ10B 2 CLK2_P
D5 NLCLK20P
CLK2_P NLPCIE0REFCLK0N
PCIE_REFCLK_N
2
PIU1000D5
0 = disable tamper detect
G20 NLEPIT20EPITO
EPIT2_EPITO NLCPU0XTALI
CPU_XTALI A7
EIM_D20 PIU1000G20 NLSMB0SCL PIU1000A7 XTALI NLPCIE0REFCLK0P
H20 SMB_SCL GND B7 PCIE_REFCLK_P
EIM_D21 PIU1000H20 NLPCIE0WAKE COP0FUSE PIU1000B7 XTALO
E23 PCIE_WAKE P_FUSE COY10B
Y10B
EIM_D22 PIU1000E23 NLRGMII0NRST NLCPU0XTALO i
D25 RGMII_NRST 2 1 CPU_XTALO
NVCC_EIM0
EIM_D23 PIU1000D25 PIP0FUSE01 1 PIY10B02 PIY10B01
EIM_D24
F22
PIU1000F22
NLUART30TXD
UART3_TXD PIP0FUSE02 2
PIR57B02 PCIE_CLK
G22 NLUART30RXD
UART3_RXD 24.0000 MHz 15ppm 8pF 70 ohm ESR (NDK NX3225SA) COR57B
R57B
EIM_D25 PIU1000G22 NLUART20TXD NLRTC0XTALI 100, 1% (DNP)
E24 UART2_TXD 2 pin 1.27mm male header RTC_XTALI D9
EIM_D26 PIU1000E24 COR32B
R32B PIU1000D9 RTC_XTALI
E25
EIM_D27 PIU1000E25
NLUART20RXD
UART2_RXD PIR32B01 PIR32B02 C9
PIU1000C9 RTC_XTALO
PIR57B01
RTC_XTALO
NLSMB0SDA
NLRTC0XALO
G23
PIU1000G23 SMB_SDA 10M, 1% (DNP)
EIM_D28 NLPCIE0RST
J19 PCIE_RST
EIM_D29 PIU1000J19 NLSATA0PWRON PIR3 B01
J20 SATA_PWRON
2.2M, 1%
EIM_D30 PIU1000J20
18pF, NP0
18pF, NP0
H21 COR33B
R33B
EIM_D31 PIU1000H21 PIC1 B01 PIC12B01 COR34B
R34B
PIR34B01 PIR34B02
E22
EIM_EB2 PIU1000E22
NLDDC0SCL
DDC_SCL PIR3 B02 COC11B
C11B COC12B
C12B 10M, 1% (DNP)
F23
EIM_EB3 PIU1000F23
PIC1 B02 PIC12B02
P3.3V_DELAYED Abracon ABS06-32.768KHZ-T 12.5pF CL P3.3V_DELAYED
0 ohm (DNP)
C N22 NLEIM0BCLK
EIM_BCLK COY11B
Y11B P3.3V_DELAYED P3.3V_DELAYED C
EIM_BCLK PIU1000N22
M25
EIM_WAIT PIU1000M25
NLEIM0WAIT
EIM_WAIT PIR35B01 PIR36B01 2
PIY11B02 1
PIY11B01 PIR39B01
COR35B COR36B Default boot: internal microSD PIR41B01 COR39B
10k, 1%
10k, 1%
R35B R36B R39B
COR41B
10k, 1%
18pF, NP0
18pF, NP0
K21 COP0EXT
P_EXT R41B
EIM_EB0 PIU1000K21
Boot select header precedence: P_USB (A) > P_SATA (B) > PEXT (C)
EIM_EB1
K23 PIR35B02 PIR36B02 GND PIC13B01 PIC14B01 1
PIR39B02
PIU1000K23
C13B
COC13B C14B
COC14B PIP0EXT01
PIP0EXT02 2
C PIR41B02
BT_CFG1_0
EIM_DA0
L20
PIU1000L20
NLEIM0DA0
EIM_DA0 PIC13B02 PIC14B02 P_FUSE must be used alone, if at all NLBT0CFG101
BT_CFG1_1 <- replicate to isolate -> NLBT0CFG204
BT_CFG2_4
COR37B
R37B
BT_CFG1_1
EIM_DA1
J25 NLEIM0DA1
EIM_DA1 BT_CFG1_1 2 pin 1.27mm male header
PIQ1 B03 PIQ12B03
3
3
PIU1000J25 PIR37B01 PIR37B02
BT_CFG1_2 L21 NLEIM0DA2
EIM_DA2 4.7k, 1% P3.3V_DELAYED
EIM_DA2 PIU1000L21
COQ11B COQ12B
BT_CFG1_3
EIM_DA3
K24
PIU1000K24
NLEIM0DA3
EIM_DA3 GND P3.3V_DELAYED NLBT0CFG203
BT_CFG2_3 1
PIQ11B01
Q11B
PIQ12B01
1 Q12B
BT_CFG1_4
EIM_DA4
L22
PIU1000L22
EIM_DA4
NLEIM0DA4
COR38B
R38B
PIR43B01COR43B PIR45B01COR45B 2N7002W 2N7002W
3 10k, 1%
10k, 1%
BT_CFG1_5
EIM_DA5
L23
PIU1000L23
EIM_DA5
NLEIM0DA5 PIR38B01 PIR38B02
BT_CFG1_5 P_SATA
COP0SATA R43B R45B
PIQ1 B02 PIQ12B0
2
2
BT_CFG1_6 K25 EIM_DA6
NLEIM0DA6 header absent = boot from internal SD
NVCC_EIM2
EIM_DA6 PIU1000K25 4.7k, 1%
COR40B PIP0SATA01 1
BT_CFG1_7
EIM_DA7
L25
PIU1000L25
NLEIM0DA7
EIM_DA7 R40B
PIR40B01 PIR40B02 BT_CFG1_6 PIP0SATA02 2
B PIR43B02 NLBT0CFG106
BT_CFG1_6 PIR45B02 header present = boot from external SD
BT_CFG2_0
BT_CFG2_1
EIM_DA8
EIM_DA9
L24
PIU1000L24
M21
PIU1000M21
NLEIM0DA8
EIM_DA8
NLEIM0DA9
EIM_DA9
4.7k, 1%
2 pin 1.27mm male header PIQ13B0 COQ13B BT_CFG1_1 = !BT_CFG2_3
BT_CFG2_2 M22 NLEIM0DA10
EIM_DA10 NLBT0CFG105
BT_CFG1_5 1 Q13B GND BT_CFG2_4 = !BT_CFG2_3
EIM_DA10 PIU1000M22
NLEIM0DA11 R42B
COR42B PIQ13B01
2N7002W
BT_CFG2_3 M20 EIM_DA11 BT_CFG2_3
EIM_DA11 PIU1000M20 PIR42B01 PIR42B02
BT_CFG2_4
EIM_DA12
M24 NLEIM0DA12
EIM_DA12 4.7k,
R44B1%
header absent = boot from SD
PIQ13B02
2
PIU1000M24 COR44B
BT_CFG2_5
EIM_DA13
M23
PIU1000M23
NLEIM0DA13
EIM_DA13 PIR44B01 PIR44B02
BT_CFG2_4 PIR56B01 header present = boot from SATA
10k, 1%
BT_CFG2_6 N23 NLEIM0DA14
EIM_DA14 4.7k, 1%
COR56B BT_CFG1_6 = !BT_CFG1_5
R56B
EIM_DA14 PIU1000N23
BT_CFG2_7
EIM_DA15
N24
PIU1000N24
NLEIM0DA15
EIM_DA15
PIR56B02
D PIR46B01 PIR47B01 PIR48B01 PIR49B01 PIR50B01 PIR51B01 PIR52B01 PIR53B01 PIR54B01 PIR5 B01 D
COR46B
R46B COR47B COR48B COR49B
R49B COR50B
R50B COR51B
R51B COR52B COR53B COR54B
R54B COR55B Copyright 2014 Andrew "bunnie" Huang
10k, 1%
10k, 1%
10k, 1%
10k, 1%
10k, 1%
10k, 1%
10k, 1%
10k, 1%
10k, 1%
10k, 1%
R47B R48B R52B R53B R55B GND
Title
PIR46B02 PIR47B02 PIR48B02 PIR49B02 PIR50B02 PIR51B02 PIR52B02 PIR53B02 PIR54B02 PIR5 B02
Novena PVT2-A
Size Number Revision
GND BOOT_CFG1[7:0]: 0XX0 00X0
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 B
BOOT_CFG2[7:0]: 001X X000
Date: 7/5/2014 Sheet of
File: F:\largework\..\06cpu_soc.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
P3.3V_DELAYED
Internal microSD card
COR10S
(main boot)
PIR10S02
R10S
PIR10S01 PIR1 S01 COU100B
U100B
COR11S
1k, 1% PIQ10S 3 R11S iMX6Q - MCIMX6Q5EYM12AC P2.5V_VGEN5
3
COC10S
C10S COQ10S
Q10S 68k, 1% i.MX6Q
PIC10S02 PIC10S01
1 2N7002W
PIQ10S01
PIR1 S02
SD3_RST_N
COR21S
R21S
PIR21S01 PIR21S02
0.01uF, 10V, X5R, 10%
PIQ10S2 NLGPT0CMPOUT1
GPT_CMPOUT1 B21
SD1_CMD
PIU1000B21 ENET_MDC
V20
PIU1000V20
NLRGMII0MDC
RGMII_MDC 300, 1%
2
NLGPT0CLKIN NLRGMII0MDIO
NVCC_SD1
GPT_CLKIN D20 V23 RGMII_MDIO
COR12S
R12S NLGPT0CAPIN1 SD1_CLK
PIU1000D20 ENET_MDIO PIU1000V23
PIR12S02 PIR12S01 GPT_CAPIN1 A21
PIU1000A21 U21
A NLFPGA0EXP0ON SD1_DAT0 ENET_CRS_DV PIU1000U21
NLRGMII0REF0CLK A
100k, 1% FPGA_EXP_ON PIU1000C20
C20 V22
PIU1000V22 RGMII_REF_CLK note: this is a high speed line at 125 MHz, route as 50 ohms
SD1_DAT1 ENET_REF_CLK
PIQ1 S01 GND E19
PIU1000E19 SD1_DAT2 ENET_RX_ER
W23
PIU1000W23
NLOTG0ID
OTG_ID
COR20S
1
P3.3V_DELAYED NLSD30RST0INV
SD3_RST_INV NLGPT0CMPOUT3
GPT_CMPOUT3 PIU1000F18
F18 V21 RGMII_INT R20S
SD1_DAT3 ENET_TX_EN PIU1000V21 PIR20S01 PIR20S02
49.9, 1% (DNP)PIC16S02 COC16S
NVCC_ENET
2
PIQ11S02 3
PIQ11S03 support 200mA max NLSDCARD0VDD
SDCARD_VDD NLSD20CMD
SD2_CMD F19
PIU1000F19 W21
PIU1000W21 C16S
SD2_CMD ENET_RXD0 PIC16S01 2200pF, X7R, 50V, 10% (DNP)
NVCC_SD2
COQ11S
Q11S
NLSD20CLK
SD2_CLK C21 W22
PIR13S01 NLSD20DAT0 PIU1000C21 SD2_CLK ENET_RXD1 PIU1000W22
FDN304P SD2_DAT0 A22
COR13S
R13S NLSD20DAT1 PIU1000A22 SD2_DAT0
SD2_DAT1 E20 U20
PIR14S01 100, 1% NLSD20DAT2 PIU1000E20 SD2_DAT1 ENET_TXD0 PIU1000U20
COJ10S SD2_DAT2 A23 W20 GND
J10S COR14S PIR13S02 NLSD20DAT3 PIU1000A23 SD2_DAT2 ENET_TXD1 PIU1000W20
0.1uF, 6.3V, X5R
4.7uF, 10V, X5R, 10%
1 SD3_DAT2 R14S SD2_DAT3 B22 note double-up on this pin
DAT2 PIJ10S01 PIU1000B22 SD2_DAT3
PIC1 S01 PIC12S01 2
CD/DAT3 PIJ10S02
SD3_DAT3 10k, 1%
PIQ12S03 ambiguous if one is better than the other, but no harm to wire up both
3
COC11S
C11S COC12S
C12S 3 SD3_CMD PIR14S02 (one BSP uses P5, another uses V21)
CMD PIJ10S03 COQ12S
PIC1 S02 PIC12S02 4
VDD PIJ10S04
1
PIQ12S01
Q12S
5
PIJ10S05 SD3_CLK 2N7002W NLSD30CMD
SD3_CMD B13
PIU1000B13 W5
PIU1000W5
NLUART40TXD
UART4_TXD DQ only Place mirror-image on bottom side of board
CLK SD3_CMD KEY_COL0
CONT11S
NT11S 6
VSS PIJ10S06 PIQ12S0 NLSD30CLK
SD3_CLK D14
PIU1000D14 SD3_CLK KEY_ROW0
V6
PIU1000V6
NLUART40RXD
UART4_RXD TL3342F160QG/TR (DNP)
2
7 SD3_DAT0 NLSD30DAT0
SD3_DAT0 E14 U7 NLKEY0COL1
KEY_COL1 TL3342F160QG/TR COSW11S
SW11S
DAT0 PIJ10S07 NLSD30DAT1
PIU1000E14
SD3_DAT0 KEY_COL1 PIU1000U7
NLKEY0ROW1 COSW10S
GND 8 SD3_DAT1 SD3_DAT1 F14 U6 KEY_ROW1 P3.3V_DELAYED SW10S
DAT1 PIJ10S08 PIU1000F14 SD3_DAT1 KEY_ROW1 PIU1000U6
NVCC_SD3
Novena PVT1 firmware NLSD30DAT2
SD3_DAT2 A15 W6 NLKEY0COL2
KEY_COL2
AUK TFC08W01-HC-H PIU1000A15 SD3_DAT2 KEY_COL2 PIU1000W6
1
2
3
4
NLSD30DAT3
SD3_DAT3 B15
PIU1000B15 SD3_DAT3 KEY_ROW2
W4
PIU1000W4
NLKEY0ROW2
KEY_ROW2 PIR15S01
1
2
3
4
CONT10S
NT10S D13
PIU1000D13 SD3_DAT4 KEY_COL3
U5
PIU1000U5
NLKEY0COL3
KEY_COL3
NLKEY0ROW3
COR15S
R15S
PISW10S1 PISW10S2 PISW10S3 PISW10S4 PISW1S01 PISW1S02 PISW1S03 PISW1S04
0.1uF, 6.3V, X5R
GND C13 T7 KEY_ROW3 10k, 1%
PIU1000C13 SD3_DAT5 KEY_ROW3 PIU1000T7
NLKEY0COL4 PIR15S02
ensure low voltage for proper reset E13 T6 KEY_COL4
PIU1000E13 SD3_DAT6 KEY_COL4 PIU1000T6
4 GByte MicroSD (Sandisk SDSDQ-4096) F13
PIU1000F13 SD3_DAT7 KEY_ROW4
V5
PIU1000V5
NLLCD0BL0ON
LCD_BL_ON PIC15S01 COC15S
GND NLSD30RST0N
SD3_RST_N D15 C15S
B PIU1000D15 SD3_RST B
PIC15S02
AUD_CLK
i close to CPU
COR16S
NVCC_GPIO
NLAUD0MCLK0TPIR16S02R16S
T5 AUD_MCLK_T NLAUD0MCLK
PIR16S01 AUD_MCLK 50 ohm trace GND
External SD card GPIO_0
GPIO_1
PIU1000T5
T4
PIU1000T4 49.9, 1%
i AUD_CLK
B11 T1 NLSD20WP
SD2_WP
PIU1000B11 MLB_CP GPIO_2 PIU1000T1
A11
PIU1000A11 MLB_CN
R7
PIR17S01 GPIO_3 PIU1000R7
NLSD20CD
R6 SD2_CD
COJP10S COR17S
R17S GPIO_4 PIU1000R6
JP10S B9 R4
10k, 1%
PIU1000B9 MLB_SP GPIO_5 PIU1000R4
1 SD2_DAT3 A9 T3
DAT3/RSV PIJP10S01 PIU1000A9 MLB_SN GPIO_6 PIU1000T3
2
CMD PIJP10S02
SD2_CMD PIR17S02 GPIO_7
R3
PIU1000R3
3 A10 R5
GND PIJP10S03 PIU1000A10 MLB_DP GPIO_8 PIU1000R5
4 B10 T2
VCC PIJP10S04 PIU1000B10 MLB_DN GPIO_9 PIU1000T2
0.1uF, 6.3V, X5R
5 SD2_CLK R2
CLK PIJP10S05 GPIO_16 PIU1000R2
PIC13S01 6
GND PIJP10S06
PIR18S01 PIR19S01 GPIO_17
R1
PIU1000R1
NLPCIE0PWRON
PCIE_PWRON
COC13S
C13S 7
PIJP10S07 SD2_DAT0 COR18S
R18S COR19S
R19S P6
PIU1000P6
DAT0/DAT GPIO_18
PIC13S02 8
DAT1 PIJP10S08
SD2_DAT1 10k, 1% 10k, 1%
GPIO_19
P5
PIU1000P5
NLRGMII0INT
RGMII_INT
9
DAT2 PIJP10S09
SD2_DAT2 PIR18S02 PIR19S02
WP SD2_WP
WP PIJP10S0WP
GND CD_WP_COM
CD_WP_COM PIJP10S0CD0WP0COM
CD SD2_CD
CD PIJP10S0CD
0 F15
CASE PIJP10S00 NANDF_CS0 PIU1000F15
C16
NANDF_CS1 PIU1000C16
C SD/MMC A17 C
NANDF_CS2 PIU1000A17
HRS DM1AA-SF-PEJ(21) D16
NANDF_CS3 PIU1000D16
A16
NANDF_ALE PIU1000A16
GND C15
NANDF_CLE PIU1000C15
E15
NANDF_WP_B PIU1000E15
B16
NANDF_RB0 PIU1000B16
A18
NANDF_D0 PIU1000A18
C17
NANDF_D1 PIU1000C17
F16
NANDF_D2 PIU1000F16
P3.3V_DELAYED D17
NANDF_D3 PIU1000D17
P3.3V_DELAYED A19
NANDF_D4 PIU1000A19
B18
NANDF_D5 PIU1000B18
P3.3V_DELAYED E17
NVCC_NANDF
Device addr = 0xAC NANDF_D6 PIU1000E17
0.1uF, 6.3V, X5R
C18
NANDF_D7 PIU1000C18
PIC14S01 COU10S
U10S
C14S
COC14S 1 8
PIU10S01 A0 VCC PIU10S08
PIC14S02 2
PIU10S02 A1 WP
7
PIU10S07 SD4_CLK
E16
PIU1000E16
3 6 NLI2C30SCL
I2C3_SCL B17
PIU10S03 A2 SCL PIU10S06 SD4_CMD PIU1000B17
4 5 NLI2C30SDA
I2C3_SDA
PIU10S04 GND SDA PIU10S05
GND D18
SD4_DAT0 PIU1000D18 Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0
FT24C512AUTR-T B19
SD4_DAT1 PIU1000B19
F17
SD4_DAT2 PIU1000F17
D A20 D
SD4_DAT3 PIU1000A20 Copyright 2014 Andrew "bunnie" Huang
GND GND E18
SD4_DAT4 PIU1000E18
C19 Title
Utility EEPROM, 64kx8 SD4_DAT5 PIU1000C19
B20
SD4_DAT6 PIU1000B20
Store non-volatile configuration info D19
SD4_DAT7 PIU1000D19
Novena PVT2-A
And possibly parts of panic logs Size Number Revision
B
Date: 7/5/2014 Sheet of
File: F:\largework\..\07sdcard.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
P5.0V_DELAYED P3.3V_DELAYED
COR10U
R10U
PIR10U01 PIR10U02
0 ohm (DNP) PIC10U 1
Primary function hub COC10U
C10U
PIC10U 2 PIR12U02 10% (DNP)
4.7uF, 10V, X5R,
COR11Uset for individual power management
COR12U R11U
10uF, 10V, X5R, 20% (DNP)
R12U PIR11U02 PIR11U01
COR13U
R13U 10k, 1%
PIR13U01 PIR13U02 100k, 1%
0 ohm (DNP) GND PIR12U01
42 USB_OVERCUR1_N
COL10U GND
NLUSB0PWREN1 LUSB0OVERC1N
L10U
4.7uF, 10V, X5R, 10%
PIC1 U01 PIR14U02
43 USB_PWREN1_N
P3.3V_DELAYED
NLUSBA0P303VA COC11U COR14U
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PIL10U01 PIL10U02 USBA_P3.3VA C11U R14U
PIC12U01 PIC13U01 PIC14U01 PIC15U01 PIC16U01 PIC17U01 PIC18U01 PIC1 U02
40 internal pullup
BLM18KG121 10k, 1%
3A 120 ohm
COC12U
C12U COC13U
C13U COC14U
C14U COC15U
C15U COC16U
C16U COC17U
C17U COC18U
C18U PIR14U01
PIC12U02 PIC13U02 PIC14U02 PIC15U02 PIC16U02 PIC17U02 PIC18U02 P3.3V_DELAYED
self-powered
OTG port - allow B mode only P3.3V_DELAYED GND
A A
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PIR15U02 PID16U01 PIC19U01 PIC20U01
GND
PIU10 48 PIU10 47 PIU10 46 PIU10 45 PIU10 4 PIU10 43 PIU10 42 PIU10 4 PIU10 4 PIU10 39 PIU10 38 PIU10 37
1
Micro-B COR15U
R15U P5.0V_DELAYED COU10U
U10U COC19U
C19U COC20U
C20U
48
47
46
45
44
41
39
38
37
COP10U
P10U 10k, 1% COL11U
L11U
COD16U
D16U PIC19U02 PIC20U02
PIR15U01 COU11U
U11U RSA5M ports 2/3 are non-removable
PGANG
DVDD
V33
V5
AMBER1
GREEN1
SEL27
PWREN1#
OVCUR1#
PWREN2#
OVCUR2#
PSELF
OTG_VBUS 1
PIP10U01 USB_OVERCUR1_N 1
PIU11U01 PIU11U05 5 PIL11U01 PIL11U02 P3.3V_DELAYED
VBUS FLG VOUT
PID16U02
P5.0V_USBEXT1
USB_OTG_N 2 2 BLM18KG121 GND
USB_NETS i
NLP50VUSBEXT1
PIP10U02 PIU11U02
D- GND
PID10U1
2
1.0uF, 25V, 20% X5R
USB_OTG_P 3 USB_PWREN1_NPIU11U03
3 4 3A 120 ohm
USB_NETS i PIP10U03 D+ EN VIN PIU11U04
1
COR16U
R16U
0.1uF, 25V, X5R
4 Amber1/Green4 NC => Port 1 is CDP 1 36 low-active power switches
PAD
PIP10U04 ID COD10U
D10U PIC21U01 PIU10U01 AVDD AMBER2 PIU10U036 COR17U
R17U PIR16U01 PIR16U02
5
PIP10U05 RT9711BGB 2
PIU10U02 35 10k, 1%
PIR41U02 GND COC21U PIC2 U01 GND GREEN2 PIU10U035 PIR17U01 PIR17U02
P3.3V_DELAYED
PID1U0 PID1U02 RSA5M C21U COP11U
P11U GND NLUSB0H10D0N
USB_H1_D_N 3 34
100, 1% (DNP)
COR41U COC22U USB_NETS i NLUSB0H10D0P PIU10U03 DM0 DVDD PIU10U034 10k, 1% COR18U
R18U
PIC21U02
PI 10U 0
0.1uF, 25V, X5R
R41U C22U USB_H1_D_P 4 33 GND
220uF, 10V, VS D
PIP11U01 PIU10U04
PIR42U02 PIC2 U02 PIC23U01 1 USB_NETS i DP0 AMBER3 PIU10U033 COR19U PIR18U01 PIR18U02
1
2
FCI 10103594-0001LF
0 PID10U2 GND
C23U 2
PIP11U02
i USB_NETS USB_NETS i
NLUSB0EXT10N
USB_EXT1_N 5
PIU10U05
DM1
32
GREEN3 PIU10U032
R19U
PIR19U01 PIR19U02 10k, 1%
1
PIR41U01 PIC24U01
2
COR42U
R42U COD11U
D11U COC24U
C24U COC23U NLUSB0EXT10P
USB_EXT1_P 6 31 10k, 1% NLUSB0PWREN30N
USB_PWREN3_N P3.3V_DELAYED
3 i USB_NETS USB_NETS i DP1 PWREN3# PIU10U031
K1
GND K2
PIP11U03 PIU10U06
0.1uF, 25V, X5R
100k, 1% RCLAMP0502B PIC23U02 7 GL852GC 30 NLUSB0OVERCUR30N
USB_OVERCUR3_N
NLOTG0ID PIR42U01 PIR20U01 PIC24U02 4 PIP11U04 PIU10U07 AVDD OVCUR3# PIU10U030 PIR21U02
OTG_ID 0 8 LQFP48 29
PIC25U01 COR20U 0 PIP11U00 PIU10U08 GND PWREN4# PIU10U029 COR21U
PID15U01 R20U AUK USB-1X04-SR-BK-S-H
PID12U0 PID12U0 USB_NETS i
NLUSB0ETH0N
USB_ETH_N 9
PIU10U09
DM2 OVCUR4#
28 internal pullup
PIU10U028 R21U
1
COC25U 100, 1%
C25U NLUSB0ETH0P
USB_ETH_P 10 GL852GC-MNG 27 10k, 1%
USB_NETS i PIU10U010
DP2 TEST PIU10U027
1
2
PIC25U02 PIR20U02 PIR21U01
COD15U
D15U
PID1U03 11
PIU10U011 RREF RESET#
26
PIU10U026
NLMASTERHUB0RESET
MASTERHUB_RESET
3
RSA5M COD12U
D12U use explicit reset line to reboot USB ethernet 12 25 P3.3V_DELAYED
AVDD SEL48
K1
GND K2
PIU10U012 PIU10U025
RCLAMP0502B USB ethernet has no power control
COR23U
AMBER4
GREEN4
PIR2 U02 R23U PIR26U01
PID15U02 GND PIR23U01
NLRESETBMCU
PIR23U02 RESETBMCU
AVDD
AVDD
2
COR22U
R22U COR26U
R26U
GND
GND
DM3
DM4
0 ohm
DP3
DP4
680, 1% 1k, 1%
X1
X2
COR27U
R27U PIR26U02
PID12U03 PIR27U01 PIR27U02
NLUSB0HUB10RST
USB_HUB1_RST
3
PIR2 U01
PIU10 3 PIU10 14 PIU10 15 PIU10 6 PIU10 7 PIU10 8 PIU10 9 PIU10 2 PIU10 2 PIU10 2 PIU10 23 PIU10 24 GND 0 ohm (DNP)
13
14
15
16
17
18
19
20
21
22
23
24
GND
GND PIR24U01COR24U
R24U
SoC interface
USB_OPT_N
10k, 1%
USB_OPT_P
P5.0V_SWBST
NLOTG0VBUS
OTG_VBUS COR43U
R43U
COR25U
R25U
PIR25U02
0 ohm
PIR25U01
NLUSB0OPTNLUSB0OPT PIR24U02
AMBER3/4 PD => 4 DP declared
0.22uF, 6.3V, X5R 10%
PIR43U02 PIR43U01
0 ohm GND
4.7uF, 10V, X5R, 10%
NLUSB0VBUS
USB_VBUS
B PIC28U01COC28U
C28U PIC35U01 i i
B
COU100G
U100G COC35U
C35U USB_NETS
USB_NETS
iMX6Q - MCIMX6Q5EYM12AC PIC28U02 PIC35U02
i.MX6Q - USB COY10U
Y10U
1 2
PIY10U01 PIY10U02
B8 GND
USB_OTG_CHD_B PIU1000B8 NLUSB0PCI0N
USB_PCI_N 12.0000 MHz (NDK NX5032GB-12MHZ-STD-CSK-5, 30ppm, 8pF)
USB_NETS i NLUSB0PCI0P
E9 USB_PCI_P
USB_OTG_VBUS PIU1000E9 NLUSB0OTG0N USB_NETS i
B6 USB_OTG_N
USB_OTG_DN PIU1000B6
PIC31U01 PIC32U01
8.2 pF, NP0
8.2 pF, NP0
A6 NLUSB0OTG0P
USB_OTG_P
0.22uF, 6.3V, X5R 10%
USB_OTG_DP PIU1000A6 COC31U
C31U COC32U
C32U
NLVDDUSB0CAP
VDDUSB_CAPPIU1000F9
F9
VDDUSB_CAP PIC31U02 PIC32U02
PIC3 U01COC33U
C33U PIC34U01 COC34U
C34U
PIC3 U02 PIC34U02 10uF, 10V, X5R, 20%
E10 USB_H1_D_P
USB_H1_DP PIU1000E10
F10 USB_H1_D_N
USB_H1_DN PIU1000F10
GND D10
USB_H1_VBUS PIU1000D10
0.22uF, 6.3V, X5R 10%
Slave function hub
4.7uF, 10V, X5R, 10%
NLVBUS0HOST
VBUS_HOST
PIC27U01 PIC36U01COC36U
C36U
COC27U
C27U P5.0V_DELAYED P3.3V_DELAYED
PIC27U02 PIC36U02 COR28U
R28U
Amber1/Green4 NC => Port 1 is CDP
PIR28U01 PIR28U02
0 ohm (DNP) PIC37U01 COC37U
C37U
GND PIC37U02 PIR30U02 10% (DNP)
4.7uF, 10V, X5R,
COR29U
COR30U R29Uset for individual power management
10uF, 10V, X5R, 20% (DNP)
R30U PIR29U02 PIR29U01
COR31U
R31U 10k, 1%
PIR31U01 PIR31U02 100k, 1%
0 ohm (DNP) GND PIR30U01
42 USB_OVERCUR5_N
40 USB_OVERCUR6_N
COL13U GND
NLUSB0PWRE5NLUSB0OVERC5NLUSB0PWRE6NLUSB0OVERC6N
L13U
4.7uF, 10V, X5R, 10%
PIC38U01 PIR32U02
43 USB_PWREN5_N
41 USB_PWREN6_N
P3.3V_DELAYED
NLUSBB0P303VA COC38U COR32U
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
USBB_P3.3VA C38U R32U
PIL13U01 PIL13U02
BLM18KG121 PIC39U01 PIC40U 1 PIC41U01 PIC42U01 PIC43U01 PIC4 U01 PIC45U01 PIC38U02 10k, 1%
3A 120 ohm COC39U
C39U COC40U
C40U COC41U
C41U COC42U
C42U COC43U
C43U COC44U
C44U COC45U
C45U PIR32U01
PIC39U02 PIC40U 2 PIC41U02 PIC42U02 PIC43U02 PIC4 U02 PIC45U02 P3.3V_DELAYED
self-powered
P3.3V_DELAYED GND
C C
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PIR3 U02 PIC46U01 PIC47U01
P5.0V_DELAYED
PID17U01 GND
PIU13048 PIU13047 PIU13046 PIU13045 PIU1304 PIU13043 PIU13042 PIU1304 PIU1304 PIU1309 PIU1308 PIU1307
1
COR33U
R33U COU13U
U13U COC46U
C46U COC47U
C47U
48
47
46
45
44
39
38
37
10k, 1%
L14U
COL14U
D17U
COD17U PIC46U02 PIC47U02
PIR3 U01 COU14U
U14U RSA5M
AMBER1
GREEN1
PWREN1#
OVCUR1#
PWREN2#
OVCUR2#
PSELF
PGANG
DVDD
V33
V5
SEL27
USB_OVERCUR8_NPIU14U01
1 5
FLG VOUT PIU14U05 PIL14U01 PIL14U02
P5.0V_USBEXT2
2 BLM18KG121
PID17U02 GND
PIU14U02 GND
NLP50VUSBEXT2
2
1.0uF, 25V, 20% X5R
USB_PWREN8_NPIU14U03
3 4 3A 120 ohm
EN VIN PIU14U04
COR34U
R34U
1 36 low-active power switches
PIU13U01 AVDD AMBER2 PIU13U036 PIR34U01 PIR34U02
RT9711BGB 2 35 10k, 1%
PIU13U02 GND GREEN2 PIU13U035
PIC48U01 P13U
COP13U GND USB_OPT_N 3
PIU13U03 DM0
34
DVDD PIU13U034 COR35U
COC48U R35U
0.1uF, 25V, X5R
C48U USB_OPT_P 4 33 GND
220uF, 10V, VS D
1 PIP13U01 NLUSB0EXT20N PIU13U04 DP0 AMBER3 PIU13U033 PIR35U01 PIR35U02
GND PIC48U02 PIC49U01 USB_EXT2_N USB_EXT2_N 5 32 10k, 1%
C49U 2 PIP13U03 i USB_NETS USB_EXT2_P USB_NETS i DM1 GREEN3 PIU13U032
1
PIP13U02 PIU13U05
PIC50U01 COC50U
C50U COC49U
3 i USB_NETS USB_NETS i
NLUSB0EXT20P
USB_EXT2_P 6
PIU13U06 DP1
31
PWREN3# PIU13U031
NLUSB0PWREN70N
USB_PWREN7_N P3.3V_DELAYED
PIC49U02 4 PIP13U04
7
PIU13U07 AVDD
GL852GC 30
OVCUR3# PIU13U030
NLUSB0OVERCUR70N
USB_OVERCUR7_N
PIC50U02 0
0 PIP13U00
8
PIU13U08 GND LQFP48 29
PWREN4# PIU13U029 NLUSB0PWREN80N
USB_PWREN8_N PIR36U02
COR36U
R36U
AUK USB-1X04-SR-BK-S-H
PID14U01 PID14U02 USB_NETS i
USB_NETS i
USB_MOUSE_N
NLUSB0MOUSE0N
NLUSB0MOUSE0P
USB_MOUSE_P
9
PIU13U09
10
DM2
DP2
GL852GC-MNG
28
OVCUR4# PIU13U028
27
TEST PIU13U027
USB_OVERCUR8_N
NLUSB0OVERCUR80N
10k, 1%
1
2
PIU13U010
11
PIU13U011 RREF
26
RESET# PIU13U026
NLSLAVEHUB0RESET
SLAVEHUB_RESET PIR36U01
COD14U
D14U 12 25
AVDD SEL48 PIU13U025
K1
GND K2
PIU13U012
RCLAMP0502B P3.3V_DELAYED
AMBER4
GREEN4
GND PIR37U02
AVDD
AVDD
COR37U
R37U COR44U
R44U RESETBMCU PIR45U01
GND
GND
DM3
DM4
DP3
DP4
PIR44U01 PIR44U02
680, 1% COR45U
R45U
X1
X2
0 ohm
PID14U03 1k, 1%
3
PIR37U01 R46U
COR46U PIR45U02
PIU130 PIU1304 PIU1305 PIU1306 PIU13017 PIU13018 PIU1309 PIU1302 PIU1302 PIU1302 PIU1302 PIU13024 GND NLUSB0HUB20RST
USB_HUB2_RST
13
14
15
16
17
18
19
20
21
22
23
24
PIR46U01 PIR46U02
0 ohm (DNP)
P5.0V_DELAYED P3.3V_DELAYED GND Amber1/Green4 NC => Port 1 is CDP
GND PIR38U01COR38U
PIR39U01COR39U PIR40U 1COR40U R38U
USB_KBD_N
10uF, 10V, X5R, 20%
USB_KBD_P
R39U R40U 10k, 1%
USB_VID_N
U15U
COU15U
NLUSB0KDNLUSB0KDP NLUSB0VIDNLUSB0VIDP
USB_VID_P
RT9706 10k, 1% 10k, 1% PIR38U02
PIU15U04
4
VIN PIR39U02 PIR40U 2 AMBER3/4 PD => 4 DP declared
5 NLP500V0MOUSE
P5.0V_MOUSE
VOUT PIU15U05
USB_PWREN6_N PIU15U01
1
EN PIC51U01 GND
3 USB_OVERCUR6_N C51U
COC51U
FLG PIU15U03 i i i i
D PIU15U02 GND
2 PIC51U02 D
USB_NETS
USB_NETS
USB_NETS
USB_NETS
GND to front panel USB breakout via 30-pin FFC Y11U
COY11U
10uF, 10V, X5R, 20%
U16U
COU16U 1 2
PIY11U01 PIY11U02
RT9706
4 12.0000 MHz (NDK NX5032GB-12MHZ-STD-CSK-5, 30ppm, 8pF)
PIU16U04 VIN
Copyright 2014 Andrew "bunnie" Huang
1.0uF, 25V, 20% X5R
1.0uF, 25V, 20% X5R
5 NLP500V0KBD
P5.0V_KBD
VOUT PIU16U05
USB_PWREN7_N 1
PIU16U01 EN PIC52U01 Title
PIC53U01 PIC54U01
8.2 pF, NP0
8.2 pF, NP0
3 USB_OVERCUR7_N C52U
COC52U
FLG PIU16U03
Novena PVT2-A
PIC5 U01 PIC56U01 PIU16U02
2
GND
PIC52U02 C53U
COC53U C54U
COC54U
COC55U
C55U COC56U
C56U PIC53U02 PIC54U02 Size Number Revision
PIC5 U02 PIC56U02 C
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 GND
Date: 7/5/2014 Sheet of
GND File: F:\largework\..\08usb.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4
SATA connector arrangement
female
female
male
male
P5.0V_DELAYED
Mainboard
Charger
A A
HD
COR10H
R10H
PIR10H02 PIR10H01
100k, 1%
COC10H
C10H
PIC10H01 PIC10H02 P3.3V_DELAYED
1.0uF, 25V, 20% X5R
PIR1 H01
P3.3V_DELAYED
PIQ10H2
2
uses M-F extender combo cables COR11H
R11H COQ10H
Q10H
PIR12H01 10k, 1% 1
PIQ10H01
FDN304P
COR12H
R12H PIR1 H02
10k, 1%
PIQ1 H03COQ11H PIQ10H3
3
3
PIR12H02
HDD activity LED
APT1608SGC green
NLSATA0PWRON
SATA_PWRON 1 Q11H
PID10H1
1
PIQ11H01
2N7002W
PIQ1 H02 COD10H
D10H
2
PID10H2
2
PIR13H01
B For boot: compatible ONLY with SATA-II (3Gbps) drives PIR14H02 COR13H
R13H B
GND COR14H
R14H COJ10H
J10H 10k, 1%
Optimized for use with SSDs 330, 1% 1
PIJ10H01 +12V
PIR13H02
PIR14H01 2
PIJ10H02 +12V
3
PIJ10H03 +12V
4
PIJ10H04 GND
P5.0V_DELAYED GND 5
PIJ10H05 OPT
22uF, 10V, X5R, 20%
22uF, 10V, X5R, 20%
COQ12H
Q12H 6
PIJ10H06 GND
10uF, 10V, X5R, 20%
1 8 NLP500V0SATA
P5.0V_SATA 7
PIQ12H01 S D PIQ12H08 PIJ10H07 +5V
2
PIQ12H02 S D
7
PIQ12H07
PIC12H01 PIC1 H01 PIC2 H01 8
PIJ10H08 +5V
3
PIQ12H03 S
P D
6
PIQ12H06
COC12H
C12H COC11H
C11H COC22H
C22H 9
PIJ10H09 +5V
4
PIQ12H04 G D
5
PIQ12H05
PIC12H02 PIC1 H02 PIC2 H02 10
PIJ10H010 GND
11
PIJ10H011 GND
Si4435DY P3.3V_DELAYED 12
PIJ10H012 GND
10uF, 10V, X5R, 20%
VDDSOC_CAP COU100F
U100F GND 13
PIJ10H013 +3.3V
PIC13H01
4.7uF, 10V, X5R, 10%
0.22uF, 6.3V, X5R 10%
iMX6Q - MCIMX6Q5EYM12AC 14
PIJ10H014 +3.3V
PIC15H01 PIC16H01 i.MX6Q - SATA 100 ohm COC14H
C14H COC13H
C13H PIJ10H015
15
+3.3V
COC15H
C15H COC16H
C16H
i SATA_NETS PIC14H01 PIC14H02
NLSATAC0RX0P
SATAC_RX_P PIC13H02
PIC15H02 PIC16H02 G13
PIU1000G13 SATA_VP
COC17H
C17H 100 ohm 16
PIJ10H016 GND
C B14 NLSATA0RX0P
SATA_RX_P 10nF, X7R, 50V 10%PIC17H01 PIC17H02 NLSATAC0RX0N
SATAC_RX_N 100 ohm 17 C
SATA_RXP PIU1000B14
NLSATA0RX0N i SATA_NETS i SATA_NETS
PIJ10H017 B+
A14 SATA_RX_N 18
SATA_RXM PIU1000A14
10nF, X7R, 50V 10% i SATA_NETS
PIJ10H018 B-
GND 100 ohm 100 ohm 19
PIJ10H019 GND
G12 B12 NLSATA0TX0N
SATA_TX_N 100 ohm 20
PIU1000G12 SATA_VPH SATA_TXM PIU1000B12
NLSATA0TX0P i SATA_NETS i SATA_NETS
PIJ10H020 A-
A12 SATA_TX_P COC18H
C18H 21
SATA_TXP PIU1000A12
NLSATAC0TX0N i SATA_NETS
PIJ10H021 A+
VDD_HIGH_CAP 100 ohm SATAC_TX_N 22
PIC18H01 PIC18H02 PIJ10H022 GND
4.7uF, 10V, X5R, 10%
0.22uF, 6.3V, X5R 10%
COC19H
C19H
PIC20H01 PIC21H01 SATA_REXT
C14 NLSATA0REXT
SATA_REXT
PIU1000C14 i SATA_NETS
10nF, X7R, 50V 10%
PIC19H01 PIC19H02
NLSATAC0TX0P
SATAC_TX_P MOLEX 47018-2000 female
COC20H
C20H COC21H
C21H
PIC20H02 PIC21H02 PIR15H01 100 ohm 10nF, X7R, 50V 10%
COR15H
R15H
191, 1% GND
GND PIR15H02
GND
Copyright 2014 Andrew "bunnie" Huang
Title
D D
Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 A
Date: 7/5/2014 Sheet of
File: F:\largework\..\09sata.SchDoc Drawn By:
1 2 3 4
1 2 3 4 5 6
25.0000 MHz, 30ppm, 20pF, ESR <70 ohm (CTS 445C33E25M00000)
A A
P5.0V_DELAYED
PIU10E63 PIU10E5 PIU10E54 PIU10E53 PIU10E48 PIU10E37 PIU10E2 PIU10E 5 PIU10E14 PIU10E8 PIU10E4
63
55
54
53
48
37
22
15
14
8
4
COU10E
U10E GND
COR10E
GND33A_H
GND
GND
GND
GND
GND18A
GND18A
GND18A
GND18A_PLL
GND33A_PLL
GND3R3
PIR10E01
R10E PIR10E02 50
PIU10E050
NLUSB0ETH0N COR11E
R11E NLUSB0ETHI0N V_BUS
PIY10E 2
3.3pF, NP0 (DNP)
USB_ETH_N USB_ETHI_N 4.7k, 1%
PIR11E01 PIR11E02
PIC10E01 i USB_NETS PIR12E02
2
0 ohm 57
COC10E
C10E
PIU10E057 DM COY10E COR12E
Y10E R12E
56
COR13E PIC10E02 PIU10E056 DP
NLUSB0ETH0P
USB_ETH_P R13E
PIR13E01 PIR13E02 NLUSB0ETHI0P
USB_ETHI_P
i USB_NETS
2
XTL25P PIU10E02
NLEN1000XTL25P
EN100_XTL25P
PIY10E 1 1M, 1%
1
0 ohm 3
XTL25N PIU10E03
NLEN1000XTL25N
EN100_XTL25N PIR12E01
33pF, NP0
33pF, NP0
21
EN100_USB_ACTPIU10E021
MFA_3 / PHY_N RXIN
10
PIU10E010 EN100_RXI_N PIC1 E01 PIC12E01
9 EN100_RXI_P COC11E
C11E COC12E
C12E
RXIP PIU10E09
PIC1 E02 PIC12E02
NLEN1000RESET0N
EN100_RESET_N 45
PIU10E045 13 EN100_TXO_N
RESET_N TXON PIU10E013
12 EN100_TXO_P
TXOP PIU10E012
46
PIU10E046 GND RJ-45 Connector + Tranformer
TEST1
47 35
PIU10E047 TEST0 MFB_0 PIU10E035
COR14E
R14E
PIR14E01 PIR14E02 58
PIU10E058 34
RREF MFB_1 / CRSDV PIU10E034
0.1uF, 25V, X5R
12.1k, 1%
MFB_2 / TXEN PIU10E03333 PIC13E01
43 COC13E
C13E
PIU10E043 TCLK_EN
GND 42
PIU10E042 TCLK_0
32
MFB_3 / TXD1 PIU10E032
PIC13E02
41
PIU10E041 31
TCLK_1 MFB_4 / TXD0 PIU10E031
AX88772B
49.9, 1%
49.9, 1%
61
PIU10E061
X2 MFB_5 / REF50M PIU10E03030 PIR15E02 PIR16E02
62 29 COR15E
R15E COR16E
R16E
PIU10E062 X1 MFB_6 / RXD1 PIU10E029
28
MFB_7 / RXD0 PIU10E028
COJ10E PIR15E01 PIR16E01 COJP10E
J10E JP10E
COR17E
R17E
PIR17E01 PIR17E02 5
PIU10E05 27
PIU10E027 PIJ10E01 1 R8
PIJP10E0R8
RSET_BG GPIO_0 / PME TRD1+ C1 - TRP1+ TX+
GND
12.1k, 1% NLEN1000RXI0P
EN100_RXI_P R7
PIJP10E0R7 TRCT1
26 test point (DNP) EN100_A3.3V EN100_RXI_N
NLEN1000RXI0N R9
GPIO_1 PIU10E026 PIJP10E0R9 TRD1- C2 - TRP1- TX-
23 25 short CT1, CT2 for auto-MDIX
PIU10E023 EXTWAKEUP_N GPIO_2 PIU10E025
0.1uF, 25V, X5R
4.7uF, 10V, X5R, 10%
Reset Circuit R3
PIJP10E0R3 TRD2+
PIC14E01 PIC15E01 C3 - TRP2+ RX+
7 NLEN1000TXO0P
EN100_TXO_P R1
SD PIU10E07 COC14E
C14E COC15E
C15E
PIJP10E0R1 TRCT2
B U11E
COU11E NLEN1000TXO0N
EN100_TXO_N R2
PIJP10E0R2 B
TRD2- C4 - TRP3+
P3.3V_DELAYED P3.3V_DELAYED
COR18E
PIC14E02 PIC15E02
5 4 R18E R4
PIU11E05 GND DO PIU11E04 PIR18E01 PIR18E02 PIJP10E0R4 TRD3+ C5 - TRP3-
49.9, 1%
49.9, 1%
COR19E
R19E 6 3 40 PIR21E02COR21E PIR2 E02COR22E R6
PIR19E01 PIR19E02 PIU11E06 ORG DI PIU11E03 22 ohm, 1%
COR20E EEDIO
PIU10E040 PIJP10E0R6 TRCT3
PIR23E01 4.7k, 1% 7
PIU11E07 NC
2
SK PIU11E02
R20E
PIR20E01 PIR20E02
38
PIU10E038 EECK
R21E R22E R5
PIJP10E0R5 TRD3- C6 - TRP2- RX-
COR23E
R23E 8 1 39 19 EN100_LINK
PIU11E08 VCC CS PIU11E01 22 ohm, 1% PIU10E039 EECS MFA_2 / RMII_N PIU10E019 PIR21E01 PIR2 E01
0.1uF, 6.3V, X5R
47k, 1% COJ11E
J11E R11
PIJP10E0R11 TRD4+ C7 - TRP4+
PIR23E02 PIC16E01 93C66 (DNP)
MFA_1 / MDIO PIU10E018
18 PIJ11E01 1
R12
PIJP10E0R12 TRCT4
COC16E
C16E R10
PIJP10E0R10 TRD4- C8 - TRP4-
VCC33A_PLL
VCC18A_PLL
PIC16E02
0.1uF, 25V, X5R
EN100_RESET_N 17 test point (DNP) COJ12E
J12E P3.3V_DELAYED
MFA_0 / MDC
VCC33A_H
PIU10E017
PIC17E01
0.1uF, 25V, X5R (DNP)
PIJ12E01 1 L4
PIJP10E0L4
COR24E
R24E GRN_K
VCC18A
VCC18A
VCC3A3
COC17E
VCC3R3
PIC18E01
VCC3IO
VCC3IO
C17E L5
PIR24E01 PIR24E02 PIJP10E0L5 G/O_A
VCCK
VCCK
VCCK
VCCK
COC18E
C18E test point (DNP) PIC17E02 L6
V18F
330, 1% PIJP10E0L6 ORG_K
PIC18E02 93C56 or 93C66 EEPROM NLEN1000LINK
EN100_LINK
L2
NLEN1000USB0ACT
EN100_USB_ACT
COR25E
R25E PIJP10E0L2 YEL_K
Optional
PIU10E52 PIU10E6 PIU10E59 PIU10E6 PIU10E16 PIU10E4 PIU10E51 PIU10E PIU10E PIU10E64 PIU10E2 PIU10E24 PIU10E36 PIU10E49 L1
YEL_A
52
6
59
60
16
44
51
1
11
64
20
24
36
49
PIR25E01 PIR25E02 PIJP10E0L1
AX88772B GND 330, 1%
GND UDE CORP 26-21024JA13-1
0.1uF, 25V, X5R49.9, 1%
49.9, 1%
49.9, 1%
49.9, 1%
3.3V to 1.8V PIR26E02COR26E PIR27E02COR27E PIR28E02COR28E PIR29E02COR29E
On-chip Regulator R26E R27E R28E R29E
terminate unused, floating pairs
PIR26E01 PIR27E01 PIR28E01 PIR29E01
0.1uF, 25V, X5R
COL10E
L10E COL11E
L11E PIC19E01 PIC20E 1
EN100_A3.3V COC19E
C19E COC20E
C20E
PIL10E01 PIL10E02
NLEN1000D108V
EN100_D1.8V PIL11E01 PIL11E02
NLEN1000A108V
EN100_A1.8V PIC19E02 PIC20E 2
BLM18KG121 BLM18KG121
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
4.7uF, 10V, X5R, 10%
4.7uF, 10V, X5R, 10%
4.7uF, 10V, X5R, 10%
3A 120 ohm 3A 120 ohm
PIC21E01 PIC2 E01 P3.3V_DELAYED PIC23E01 PIC24E01 PIC25E01 PIC26E01 GND
COC21E
C21E COC22E
C22E COC23E
C23E COC24E
C24E COC25E
C25E COC26E
C26E
PIC21E02 PIC2 E02 PIC23E02 PIC24E02 PIC25E02 PIC26E02
4.7uF, 10V, X5R, 10%
0.1uF, 6.3V, X5R
PIC27E01 PIC28E01
COC27E
C27E COC28E
C28E
PIC27E02 PIC28E02
C C
Power and by-pass capacitors
Close to pin 16.44 Close to pin 6.59.60
P3.3V_DELAYED EN100_A3.3V
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PIC29E01 PIC30E 1 PIC31E01 PIC32E01
C29E
COC29E C30E
COC30E C31E
COC31E C32E
COC32E
PIC29E02 PIC30E 2 PIC31E02 PIC32E02
Close to pin 20.24.36.49 Close to pin 1.11.64
EN100_D1.8V EN100_A1.8V
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PIC3 E01 PIC34E01 PIC35E01 PIC36E01 PIC37E01 PIC38E01 PIC39E01
C33E
COC33E C34E
COC34E C35E
COC35E C36E
COC36E C37E
COC37E C38E
COC38E C39E
COC39E
PIC3 E02 PIC34E02 PIC35E02 PIC36E02 PIC37E02 PIC38E02 PIC39E02
D D
Copyright 2014 Andrew "bunnie" Huang
Title
Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 C
Date: 7/5/2014 Sheet of
File: F:\largework\..\10ethernet100.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
NLRGMII0RDELAY
RGMII_RDELAY
RGM_CLK i PIR2 G02 PIR23G02
EN1G_1.2VA 37 mA from P2.5V_VGEN5 COR22G
R22G COR23G
R23G
0 ohm (DNP) 0 ohm (DNP)
COC30G
C30GEN1G_P1.2V 563 mA DVDDL (1.2V) PIR2 G01 PIR23G01
0.1uF, 6.3V, X5R
PIC30G02 PIC30G01 COR24G
75 mA AVDDH (3.3V) NLRGMII0RXCLK
RGMII_RXCLK R24G RGMII_RXCLK_D
PIR24G01 PIR24G02
0.1uF, 6.3V, X5R PIC31G01 COC31G 0 ohm i
A COC12G
C12G C31G A
COC10G
C10G PIC12G01 PIC12G02 PIC31G02 RGM_CLK
PIC10G01 PIC10G02
4.7uF, 10V, X5R, 10% NLRGMII0TDEL10
RGMII_TDEL10
33pF, NP0 RGM_CLK i PIR25G02 PIR26G02
PIR10G01 NLRGMII0NRST
RGMII_NRST COR25G
R25G COR26G
R26G
PIY10G 2 COR10G
R10G PIR20G02 0 ohm (DNP) 0 ohm (DNP)
2
25.0000 MHz, 30ppm, 20pF, ESR <70 ohm (CTS 445C33E25M00000) 2.2M, 1% P2.5V_VGEN5 COR20G
R20G PIR25G01
NLRGMII0TDEL5A
RGMII_TDEL5A COR27G
R27G PIR26G01 i RGM_CLK
NLRGMII0TDEL5B
RGMII_TDEL5B
COY10GPIR10G02
Y10G 10k, 1% (DNP) RGM_CLK i PIR28G02 PIR27G02 PIR27G01
PIR29G02
EN1G_3.3VA P2.5V_VGEN5 0 ohm
PIR20G01
PIY10G1 COR28G
R28G COR29G
R29G
1
EN1G_P1.2V COC11G
C11G 0 ohm 0 ohm
PIC11G01 PIC11G02 PIR1 G02 RGM_CLK PIR28G01 PIR29G01
COR11G
R11G
COL10G
L10G i COR30G
R30G
EN1G_1.2VA 33pF, NP0 PIR12G02 4.7k, 1% PIR13G02 NLRGMII0TXCLK
RGMII_TXCLK RGMII_TXCLK_D
48 4.99k, 1%
0.1uF, 6.3V, X5R
PIR30G01 PIR30G02
COR12G PIR1 G01 COR13G
22uF, 6.3V, X5R, 20%
10uF, 10V, X5R, 20%
EN1G_3.3VA R12G AUD_CLK NLRGMII0INT
RGMII_INT R13G 0 ohm (DNP)
0.1uF, 6.3V, X5R
PIL10G01 PIL10G02
PIC13G01 BLM18KG121 PIC14G01 PIC15G01 place close to U10G 4.7k, 1% i
COC13G COC14G COC15G i COR21G
C13G
3A 120 ohm C14G C15G PIC16G01 PIR12G01 NLRGMII0REFCLK0T
RGMII_REFCLK_T R21G
PIR21G01 PIR21G02
PIR13G01
NLRGMII0REF0CLK
RGMII_REF_CLK RGM_CLK
PIC13G02 PIC14G02 PIC15G02 COC16G
C16G NLRGMII0MDIO
RGMII_MDIO
49
47
46
45
44
43
42
41
40
39
38
37
0 ohm
PIC16G02 COU10G
U10G PIU10G 49 PIU10G 48 PIU10G 47 PIU10G 46 PIU10G 45 PIU10G 4 PIU10G 43 PIU10G 42 PIU10G 41 PIU10G 40 PIU10G 39 PIU10G 38 PIU10G037
AVDDL_PLL
CLK125_MD0/LED_MODE
XI
PAD
AVDDH
XO
LDO_O
RESET_N
DVDDH
INT_N
MDIO
ISET
DVDDL
COJP10G
JP10G COU100K
U100K
R8 NLTXRXA0P
TXRXA_P 1PIU10G01 36 NLRGMII0MDC
RGMII_MDC P2.5V_VGEN5 i.MX6Q - RGMII
C1 - TRP1+ TRD1+ PIJP10G0R8 AVDDH MDC PIU10G036
R7 2PIU10G02 35 RGMII_RXCLK COC17G
C17G
B TRCT1 PIJP10G0R7 TXRXP_A RX_CLK/PHYAD2 PIU10G035 i RGM_CLK NLRGMII0TXCLK0D B
R9 NLTXRXA0N
TXRXA_N 3PIU10G03 34 D21 RGMII_TXCLK_D
C2 - TRP1- TRD1- PIJP10G0R9 TXRXM_A DVDDH PIU10G034 PIC17G01 PIC17G02 RGMII_TXC PIU1000D21
NLTXRXB0P
TXRXB_P 4PIU10G04 33 RGMII_RXDV
AVDDL RX_DV/CLK125_EN PIU10G033 i RGM_CLK 10uF, 10V, X5R, 20% NLRGMII0TXD0
R3 5PIU10G05 32 RGMII_RXD0 C22 RGMII_TXD0
C3 - TRP2+ TRD2+ PIJP10G0R3 TXRXP_B RXD0/MODE0 PIU10G032 i RGM_CLK COC18G RGMII_TD0 PIU1000C22NLRGMII0TXD1
R1 NLTXRXB0N
TXRXB_N 6PIU10G06 31 RGMII_RXD1 EN1G_P1.2V C18G F20 RGMII_TXD1
TRCT2 PIJP10G0R1 TXRXM_B RXD1/MODE1 PIU10G031 i RGM_CLK RGMII_TD1 PIU1000F20NLRGMII0TXD2
R2 TXRXC_P
NLTXRXC0P 7PIU10G07 30 E21 RGMII_TXD2
C4 - TRP3+ TRD2- PIJP10G0R2 TXRXP_C DVDDL PIU10G030 PIC18G01 PIC18G02 RGMII_TD2 PIU1000E21NLRGMII0TXD3
TXRXC_N
NLTXRXC0N 8PIU10G08 29 A24 RGMII_TXD3
0.1uF, 6.3V, X5R
TXRXM_C VSS PIU10G029 0.1uF, 6.3V, X5R RGMII_TD3 PIU1000A24
R4 9PIU10G09 28 RGMII_RXD2
C5 - TRP3- TRD3+ PIJP10G0R4 AVDDL RXD2/MODE2 PIU10G028 i RGM_CLK PIC3 G01 NLRGMII0TXEN
LED1/PHYADD
R6 10PIU10G010 27 RGMII_RXD3 C23 RGMII_TXEN
LED2/PHYAD1
NLTXRXD0P
TXRXD_P
TRCT3 PIJP10G0R6 TXRXP_D RXD3/MODE3 PIU10G027 i RGM_CLK COC33G
C33G RGMII_TX_CTL PIU1000C23
R5 NLTXRXD0N
TXRXD_N 11PIU10G011 26
C6 - TRP2- TRD3- PIJP10G0R5 TXRXM_D DVDDL PIU10G026
PIC3 G02
GTX_CLK
12PIU10G012 25 RGMII_TXEN
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
AVDDH TX_EN PIU10G025 i RGM_CLK
DVDDH
DVDDL
DVDDL
DVDDL
R11
VSS_PS
C7 - TRP4+ TRD4+ PIJP10G0R11
PIC34G01 PIC35G01
TXD0
TXD1
TXD2
TXD3
R12 EN1G_3.3VA B25 RGMII_RXCLK_D NLRGMII0RXCLK0D
TRCT4 PIJP10G0R12
COC34G
C34G COC35G
C35G RGMII_RXC PIU1000B25
R10
C8 - TRP4- TRD4- PIJP10G0R10
PIC34G02 PIC35G02 NLRGMII0RXD0
C24 RGMII_RXD0
RGMII_RD0 PIU1000C24NLRGMII0RXD1
L4
GRN_K PIJP10G0L4
EN1G_LINK
COR14G
PIU10G 13 PIU10G 14 PIU10G 15 PIU10G 16 PIU10G 17 PIU10G 18 PIU10G 19 PIU10G 20 PIU10G 21 PIU10G 2 PIU10G 23 PIU10G024 KSZ9021RN B23 RGMII_RXD1
RGMII_RD1 PIU1000B23NLRGMII0RXD2
13
14
15
16
17
18
19
20
21
22
23
24
R14G
4.7uF, 10V, X5R, 10%
0.1uF, 25V, X5R
L5 B24 RGMII_RXD2
G/O_A PIJP10G0L5 PIR14G01 PIR14G02 RGMII_RD2 PIU1000B24
L6 PIC19G01 PIC20G01 0 ohm (DNP) NLRGMII0RXD3
D23 RGMII_RXD3
EN1G_LINK
EN1G_ACT
ORG_K PIJP10G0L6 RGMII_RD3 PIU1000D23
YEL_K
L2
PIJP10G0L2
L1
EN1G_ACT PIC19G02
COC19G
C19G
PIC20G02
COC20G
C20G
EN1G_P1.2V NLE1G0INK NLE1G0ACT RGMII_RX_CTL
NLRGMII0RXDV
D22 RGMII_RXDV
PIU1000D22
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
YEL_A PIJP10G0L1
RGMII_TXCLK
P3.3V_DELAYED
RGMII_TXD0
RGMII_TXD1
RGMII_TXD2
RGMII_TXD3
UDE CORP 26-21024JA13-1 GND PIC21G01 PIC2 G01 PIC36G01 PIC37G01 iMX6Q - MCIMX6Q5EYM12AC
10uF, 10V, X5R, 20%
P3.3V_DELAYED COC21G COC22G
C21G C22G COC36G
C36G COC37G
C37G
C COR15G
R15G
PIC21G02 PIC2 G02 PIC36G02 PIC37G02 P5.0V_DELAYED
COR16G
R16G COR17G
R17G C
PIR15G01 PIR15G02 PIR16G02 PIR16G01 PIR17G02 PIR17G01
330, 1% PIR18G02 10k, 1% 10k, 1%
COR18G
R18G
COR19G
R19G i i i i i 10k, 1% GND EN1G_P1.2V
PIR19G01 PIR19G02
330, 1% RGM_CLK
RGM_CLK
RGM_CLK
RGM_CLK
RGM_CLK PIR18G01 COU11G
U11G
COL11G
L11G 6 1 COL12G
L12G
PIU11G06 EN FB PIU11G01
10uF, 10V, X5R, 20%
10uF, 10V, X5R, 20%
P3.3V_DELAYED EN1G_3.3VA 5 2
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PIU11G05 VINA GND PIU11G02
10uF, 10V, X5R, 20%
10uF, 10V, X5R, 20%
P2.5V_VGEN5 4 3
0.1uF, 6.3V, X5R
PIL11G01 PIL11G02 0.1uF, 6.3V, X5R PIU11G04 VIND SW PIU11G03 PIL12G01 PIL12G02
PIC23G01 PIC24G01 BLM18KG121 PIC25G01 PIC26G01 GND
7
PIU11G07
2.2uH, coilcraft MSS5131-222ML
COC23G
C23G COC24G
C24G3A 120 ohm COC25G
C25G COC26G
C26G PIC39G01 PIC40G 1 PID10G2 PIC27G02 PIC28G02
2
PIC23G02 PIC24G02 PIC25G02 PIC26G02 COC39G
C39G COC40G
C40G PIC29G01 LMR10510YSD COC27G
C27G COC28G
C28G
PIC39G02 PIC40G02 COC29G
C29G COD10G
D10G PIC27G01 PIC28G01
PIC29G02 CDBM140-G
4.7uF, 10V, X5R, 10%
PID10G 1
1
GND GND
GND
GND
D D
Copyright 2014 Andrew "bunnie" Huang
Title
Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 B
Date: 7/5/2014 Sheet of
File: F:\largework\..\11ethernetGbit.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
COR10X
R10X
PIR10X01 PIR10X02
COC10X
C10X 10k, 1% PIQ10X 3
3
COQ10X
Q10X
PIC10X02 PIC10X01
P1.5V_VGEN2 1 2N7002W NLPCIE0PWRON
PCIE_PWRON
PIQ10X01
PIR1 X01COR11X
0.1uF, 6.3V, X5R
4.7uF, 10V, X5R, 10%
1.0uF, 25V, 20% X5R
A PIC1 X01 PIC12X01 COR12X PIQ10X 2 R11X A
2
COC11X
C11X COC12X
C12X R12X 68k, 1%
PIR12X02 PIR12X01
PIC1 X02 PIC12X02 100k, 1% PIR1 X02
MPCIE_3.3V
PIQ1 X01 MPCIE_3.3V
1
UIM_PWRON
COJ10X
J10X P3.3V_DELAYED GND
GND PIR23X02 GND
NLUIM0PWRON
1
COR23X
R23X 2 3
PIQ11X02 PIQ11X03
NLPCIE0CLKREQ0N
68k, 1%
PIR23X01 PIJ10X 1 COQ11X
Q11X
4.7uF, 10V, X5R, 10%
22uF, 6.3V, X5R, 20%
0.1uF, 6.3V, X5R
PCIE_CLKREQ_N 1A @ 3.3V per spec FDN304P
test point (DNP) PIC13X01 PIC14X01 PIC15X01
COR13X
R13X COC13X
C13X COC14X
C14X COC15X
C15X COR14X
R14X
PIR13X02 PIR13X01 PIR14X02 PIR14X01
49.9, 1% PIC13X02 PIC14X02 PIC15X02 PIQ12X01 100k, 1%
1
PCIE_WAKE
GND
COR15X
R15X
PIR15X02
49.9, 1%
PIR15X01
NLPCIE0WAK 1.5V up to 250 mA P1.5V_VGEN2
Note deviation from PCIE spec of 375mA GND 3
PIQ12X03 2
PIQ12X02
COQ12X
Q12X
P3.3V_DELAYED
0.1uF, 6.3V, X5R
COJP10X
JP10X FDN304P
1
PIJP10X01 WAKE_N 3.3VAUX
2
PIJP10X02
PIC16X01
PCIE_CLK PCIE_CLKX 3 4 COC16X
C16X
PIJP10X03 COEX1 GND PIJP10X04
PIC16X02
i COC17X
C17Xi 5
PIJP10X05 COEX2
6
NLPCIE0REFCLK0N NLPCIE0REFCLKX0N 1.5V PIJP10X06
NLUIM0PWR COU10X
PCIE_REFCLK_N PCIE_REFCLKX_N 7
PIJP10X07 CLKREQ_N
8 UIM_PWR U10X
PIC17X02 PIC17X01 UIM_PWR PIJP10X08
NLUIM0DATA
VDDSOC_CAP 9
PIJP10X09 GND
10 UIM_DATA C4 C8
UIM_DATA PIJP10X010 PIU10X0C4 CC4 CC8 PIU10X0C8
4.7uF, 10V, X5R, 10%4.7uF, 10V, X5R, 10%4.7uF, 10V, X5R, 10%
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PCIE_CLKX 11
PIJP10X011 REFCLK_N
12 NLUIM0CLK
UIM_CLK C3 C7 GND
UIM_CLK PIJP10X012 PIU10X0C3 CLK I/O PIU10X0C7
B
PIC19X01 COC19X
PIC20X 1 COC20X
COC18X
C18Xi 13
PIJP10X013 REFCLK_P UIM_RESET
14
PIJP10X014
NLUIM0RESET
UIM_RESET C2
PIU10X0C2 RST VPP
C6
PIU10X0C6 Note: no VPP provided by mainboard
B
C19X C20X NLPCIE0REFCLK0P
PCIE_REFCLK_P NLPCIE0REFCLKX0P
PCIE_REFCLKX_P 15 16 NLUIM0VPP
UIM_VPP C1 C5 seems to be NC for most modern SIM cards
PIC18X02 PIC18X01 PIJP10X015 GND UIM_VPP PIJP10X016 PIU10X0C1 VDD VSS PIU10X0C5
PIC19X02 PIC20X02 COU100L
U100L
iMX6Q - MCIMX6Q5EYM12AC i 0.1uF, 6.3V, X5R
PCIE_DATX 17 18 SIM socket MOLEX 47308-0001
PIJP10X017 UIM_C8 GND PIJP10X018
i.MX6Q - PCIe PCIE_CLK COC21X
C21Xi 19
PIJP10X019 20
PIJP10X020
NLPCIE0WDIS0N
PCIE_WDIS_N
NLPCIE0RXX0N UIM_C4 W_DISABLE_N NLPCIE0RST
COL10X
L10X GND PCIE_DAT PCIE_RXX_N 21 22 PCIE_RST
PIC21X02 PIC21X01 PIJP10X021 GND PERST_N PIJP10X022
H7 i 23 24 MPCIE_3.3V
PIU1000H7 PCIE_VP PIJP10X023 PE_RX0_N 3.3VAUX PIJP10X024 COR16X
R16X
0.1uF, 6.3V, X5R
B1 NLPCIE0RX0N
PCIE_RX_N 0 ohm 0201 25 26
PIL10X01 PIL10X02
PIC23X01 PIC24X01 PCIE_RXM PIU1000B1NLPCIE0RX0P PIJP10X025 PE_RX0_P GND PIJP10X026 PIR16X02 PIR16X01
BLM18KG121 B2 PCIE_RX_P COC22X
C22X 27 28 68k, 1% GND MPCIE_3.3V
COC23X
C23X COC24X
C24X PCIE_RXP PIU1000B2 NLPCIE0RXX0P PIJP10X027 GND 1.5V PIJP10X028
3A 120 ohm G8 PCIE_RXX_P 29 30 SMB_SCL
APT1608SGC green
APT1608SGC green
APT1608SGC green
PIU1000G8 PCIE_VPTX PIC22X02 PIC22X01 PIJP10X029 GND SMB_CLK PIJP10X030
D10X
D11X
D12X
PIC23X02 PIC24X02 i 31
PE_TX0_N SMB_DATA
32 SMB_SDA
PID10X1 COD10X PID1X01 COD1 X PID12X01 COD12X
1
1
1
PIJP10X031 PIJP10X032
PCIE_DAT 0 ohmi 0201
PCIE_DATX 33 34
PIJP10X033 PE_TX0_P GND PIJP10X034
G7 i COC25X
PCIE_DATX
C25Xi 35 36 NLUSB0PCI0N
USB_PCI_N
PIU1000G7 PCIE_VPH PIJP10X035 GND USB_D_N PIJP10X036
GND A3 NLPCIE0TX0N
PCIE_TX_N
PCIE_TXM PIU1000A3NLPCIE0TX0P PIC25X02 PIC25X01
NLPCIE0TXX0N
PCIE_TXX_N 37
PIJP10X037 GND USB_D_P
38
PIJP10X038
NLUSB0PCI0P
USB_PCI_P
PID10X 2 PID1 X02 PID12X0
2
2
2
VDD_HIGH_CAP B3 PCIE_TX_P 39 40
PCIE_TXP PIU1000B3 PIJP10X039 3.3VAUX GND PIJP10X040 COR17X
R17X
0.1uF, 6.3V, X5R
NLPCIE0REXT
PCIE_REXT A2
PIU1000A2
0.1uF, 6.3V, X5R 41
PIJP10X041 42
PIJP10X042 PIR17X01 PIR17X02
NLPCIE0WWAN0LED
PCIE_WWAN_LED
PCIE_REXT i 3.3VAUX LED_WWAN_N COR18X
R18X
PIC27X01 PIC28X01 COC26X
C26X 43
PIJP10X043 GND LED_WLAN_N
44
PIJP10X044 330,
COR19X1% PIR18X01 PIR18X02
NLPCIE0WLAN0LED
PCIE_WLAN_LED
C27X
COC27X C28X
COC28X PIR20X02 PCIE_DAT NLPCIE0TXX0P
PCIE_TXX_P 45 46 R19X NLPCIE0WPAN0LED
PCIE_WPAN_LED
PIC26X02 PIC26X01 PIJP10X045 RESVD LED_WPAN_N PIJP10X046 PIR19X01 PIR19X02 330, 1%
PIC27X02 PIC28X02
200, 1%
COR20X
R20X 47 48 330, 1%
0.1uF,i 6.3V, X5R
PIJP10X047 RESVD 1.5V PIJP10X048
49 50
PIR20X01 PIJP10X049 RESVD GND PIJP10X050
PCIE_DATX 51 52
PIJP10X051 RESVD 3.3VAUX PIJP10X052
GND
Mini PCI-express connector (TE 1717831 or Molex 679101002, 679100002, 0483380070)
P3.3V_DELAYED
C GND C
GND GND PIR21X02 PIR2 X02
COR21X
R21X COR22X
R22X
10k, 1% 10k, 1%
PIR21X01 PIR2 X01
NLSMB0SCL
SMB_SCL
NLSMB0SDA
SMB_SDA
Wifi plug-in card symbol placeholders
CONT10X
NT10X Use ath9k-compatible PCIe card
Suggestions at left are for b/g/n 1x1 low-cost solution
Other options exist for a/b/g/n 2x2, 3x3 MIMO + BT combo
DNXA-125 or DNXA-95 PCIe half-sized card, unex.com.tw (note BT combo is via mPCIe embedded USB interface)
CONT11X
NT11X
U.FL 2.5GHz antenna
CONT12X
NT12X
U.FL 2.5GHz antenna
D D
Copyright 2014 Andrew "bunnie" Huang
Title
Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 B
Date: 7/5/2014 Sheet of
File: F:\largework\..\12mPCIe.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
LCD interface
COU100H
U100H
Designed to work with LED backlight panels 0.5A / contact
Interleaved pixel option to support UXGA resolutions iMX6Q - MCIMX6Q5EYM12AC 4x for LCD digital logic (2A max)
Requires custom cable to adapt pinout to specific LCD i.MX6Q - LVDS 5x for BL (2.5A x Vbat watts)
U2 LVDS0_TX_0_N COJP10L
JP10L
COU100D
U100D LVDS0_TX0_N PIU1000U2 NLLCD0XP
U1 LVDS0_TX_0_P LCD_XP 1
iMX6Q - MCIMX6Q5EYM12AC LVDS0_TX0_P PIU1000U1 NLLCD0YP
PIJP10L01
LCD_YP 2
PIJP10L02
AUD_CLK i.MX6Q - DISP; CSI U4 LVDS0_TX_1_N NLLCD0XM
LCD_XM 3
LVDS0_TX1_N PIU1000U4
NLLCD0YM
PIJP10L03
i.MX6 S/DL has AUD_MCLK on P4 i U3 LVDS0_TX_1_P LCD_YM 4
COR26L LVDS0_TX1_P PIU1000U3 PIJP10L04
AUD_MCLK PIR26L02R26LPIR26L01 NLAUD0MCLK0T0SDL
NLAUD0MCLK AUD_MCLK_T_SDL P4 N19 NLGPIO0PWM1
GPIO_PWM1 5
NVCC_LVDS2P5
PIU1000P4 CSI0_MCLK DI0_DISP_CLK PIU1000N19 PIJP10L05
A COJ11L
J11L P1 V2 LVDS0_TX_2_N NLLCD0BL0ON
LCD_BL_ON 6 A
49.9, 1% (DNP) PIU1000P1
CSI0_PIXCLK LVDS0_TX2_N PIU1000V2 PIJP10L06
N25 NLAUD60TXD
AUD6_TXD V1 LVDS0_TX_2_P NLI2C30SCL
I2C3_SCL 7
1 PIJ11L01 NLBATT0NRST DI0_PIN2 PIU1000N25 NLAUD60TFS LVDS0_TX2_P PIU1000V1
NLI2C30SDA
PIJP10L07
BATT_NRST N2 N20 AUD6_TFS I2C3_SDA 8
PIU1000N2 CSI0_VSYNC DI0_PIN3 PIU1000N20 PIJP10L08
test point (DNP) NLBATT0REFLASH0ALRT
AUD_CLK BATT_REFLASH_ALRT PIU1000P3 P3 P25 NLUSB0HUB10RST
USB_HUB1_RST AUD6_RXD V4 LVDS0_CLK_N 9
CSI0_DATA_EN DI0_PIN4 PIU1000P25 NLAUD60TXC LVDS0_CLK_N PIU1000V4 NLLVDS00TX000N
PIJP10L09
i N21 AUD6_TXC V3 LVDS0_CLK_P LVDS0_TX_0_N 10
COR10L DI0_PIN15 PIU1000N21 LVDS0_CLK_P PIU1000V3 PIJP10L010
AUD_CLK PIR10L02R10LPIR10L01
NLAUD0CLK NLAUD0CLK0T
AUD_CLK_T PIU1000N1
N1 NLLVDS00TX000P
LVDS0_TX_0_P 11
PIJP10L011
NLAUD0DOUT CSI0_DAT4 NLECSPI30SCLK
49.9, 1% AUD_DOUT PIU1000P2
P2 P24
PIU1000P24 ECSPI3_SCLK W2
PIU1000W2 LVDS0_TX_3_N 12
PIJP10L012
NLAUD0LRCLK CSI0_DAT5 DISP0_DAT0 NLECSPI30MOSI LVDS0_TX3_N NLLVDS00TX010N
AUD_LRCLK PIU1000N4
N4 P22 ECSPI3_MOSI W1 LVDS0_TX_3_P LVDS0_TX_1_N 13
NLAUD0DIN CSI0_DAT6 DISP0_DAT1 PIU1000P22
NLECSPI30MISO LVDS0_TX3_P PIU1000W1
NLLVDS00TX010P
PIJP10L013
NVCC_CSI
AUD_DIN N3
PIU1000N3 CSI0_DAT7
P23 ECSPI3_MISO LVDS0_TX_1_P 14
NLSMB0SDA DISP0_DAT2 PIU1000P23
NLECSPI30SS0
PIJP10L014
These are alt pins used only on S/DL SMB_SDA N6
PIU1000N6 P21
PIU1000P21 ECSPI3_SS0 HUB RST normally DNP, so available to talk to FPGA V7
PIU1000V7 15
PIJP10L015
NLSMB0SCL CSI0_DAT8 DISP0_DAT3 NLECSPI30SS1 NVCC_LVDS2P5 NLLVDS00TX020N
SMB_SCL N5
PIU1000N5 CSI0_DAT9 P20
PIU1000P20 ECSPI3_SS1 LVDS0_TX_2_N 16
PIJP10L016
DISP0_DAT4 NLECSPI30SS2 NLLVDS00TX020P
LCD_PWR_CTL PIU1000M1
M1 R25
PIU1000R25 ECSPI3_SS2 VDD_HIGH_CAP LVDS0_TX_2_P 17
PIJP10L017
NLAUD0ALRCK CSI0_DAT10 DISP0_DAT5 NLUSB0HUB20RST AUD6_RXC
0.1uF, 6.3V, X5R
AUD_ALRCK PIU1000M3
M3 R23 USB_HUB2_RST 18
CSI0_DAT11 DISP0_DAT6 PIU1000R23
PIC1 L01 PIJP10L018
These are alt pins used only on S/DL NLUART40TXD
UART4_TXD PIU1000M2
M2 R24 NLECSPI30RDY
ECSPI3_RDY NLLVDS00CLK0N
LVDS0_CLK_N 19
NLUART40RXD CSI0_DAT12 DISP0_DAT7 PIU1000R24
COC11L
C11L NLLVDS00CLK0P
PIJP10L019
UART4_RXD PIU1000L1
L1 R22 GPIO_PWM1 LVDS0_CLK_P 20
CSI0_DAT13 DISP0_DAT8 PIU1000R22
NLGPIO0PWM2 PIC1 L02 PIJP10L020
M4 T25 GPIO_PWM2 21
NVCC_LCD
PIU1000M4 CSI0_DAT14 DISP0_DAT9 PIU1000T25 PIJP10L021
M5
PIU1000M5 R21
PIU1000R21
NLFPGA0SUSPEND
FPGA_SUSPEND NLLVDS00TX030N
LVDS0_TX_3_N 22
PIJP10L022
NLUART40RTS CSI0_DAT15 DISP0_DAT10 NLFPGA0INIT0N NLLVDS00TX030P
UART4_RTS PIU1000L4
L4 T23
PIU1000T23 FPGA_INIT_N LVDS0_TX_3_P 23
PIJP10L023
NLUART40CTS CSI0_DAT16 DISP0_DAT11 NLFPGA0DONE
UART4_CTS PIU1000L3
L3 T24 FPGA_DONE GND 24
CSI0_DAT17 DISP0_DAT12 PIU1000T24
NLFPGA0RESET0N NLLVDS10TX00N
PIJP10L024
M6
PIU1000M6 CSI0_DAT18
R20 FPGA_RESET_N LVDS1_TX0_N 25
DISP0_DAT13 PIU1000R20
NLFPGA0TCK NLLVDS10TX00P
PIJP10L025
L6
PIU1000L6 U25
PIU1000U25 FPGA_TCK Y1 LVDS1_TX0_N LVDS1_TX0_P 26
CSI0_DAT19 DISP0_DAT14 NLFPGA0TDI LVDS1_TX0_N PIU1000Y1 PIJP10L026
T22
PIU1000T22 FPGA_TDI Y2 LVDS1_TX0_P 27
DISP0_DAT15 NLFPGA0TDO LVDS1_TX0_P PIU1000Y2 NLLVDS10TX10N PIJP10L027
T21
PIU1000T21 FPGA_TDO LVDS1_TX1_N 28
PIJP10L028
DISP0_DAT16 NLFPGA0TMS NLLVDS10TX10P
U24 FPGA_TMS AA2 LVDS1_TX1_N LVDS1_TX1_P 29
DISP0_DAT17 PIU1000U24
NLACCEL0INT LVDS1_TX1_N PIU1000AA2 PIJP10L029
V25 ACCEL_INT AA1 LVDS1_TX1_P 30
DISP0_DAT18 PIU1000V25
NLTS0TOUCHED LVDS1_TX1_P PIU1000AA1
NLLVDS10TX20N
PIJP10L030
U23 TS_TOUCHED LVDS1_TX2_N 31
NVCC_LVDS2P5
DISP0_DAT19 PIU1000U23 PIJP10L031
U22
PIU1000U22 NLPCIE0CLKREQ0N
PCIE_CLKREQ_N AB1 LVDS1_TX2_N NLLVDS10TX20P
LVDS1_TX2_P 32
DISP0_DAT20 NLAUD0HP0IN LVDS1_TX2_N PIU1000AB1 PIJP10L032
T20
PIU1000T20 AUD_HP_IN AB2 LVDS1_TX2_P 33
DISP0_DAT21 NLPMIC0INT0B LVDS1_TX2_P PIU1000AB2 NLLVDS10CLK0N
PIJP10L033
F4 V24 PMIC_INT_B LVDS1_CLK_N 34
PIU1000F4 CSI_CLK0M DISP0_DAT22 PIU1000V24
NLAUD0PWRON NLLVDS10CLK0P
PIJP10L034
F3
PIU1000F3 CSI_CLK0P
W24 AUD_PWRON Y3 LVDS1_CLK_N LVDS1_CLK_P 35
DISP0_DAT23 PIU1000W24 LVDS1_CLK_N PIU1000Y3 PIJP10L035
Y4 LVDS1_CLK_P 36
LVDS1_CLK_P PIU1000Y4 PIJP10L036
E4
PIU1000E4 NLLVDS10TX030N
LVDS1_TX_3_N 37
PIJP10L037
CSI_D0M NLLVDS10TX030P
E3
PIU1000E3 AA3 LVDS1_TX_3_N LVDS1_TX_3_P 38
CSI_D0P LVDS1_TX3_N PIU1000AA3 PIJP10L038
AA4 LVDS1_TX_3_P 39
LVDS1_TX3_P PIU1000AA4 PIJP10L039
NVCC_MIPI
D1 H3 LCD_VCC leads LCD_BL voltages in power-on and down transitions combo logic+EDID power 40
54-pin FFC MOLEX 51296-5494 or equiv
PIU1000D1 CSI_D1M DSI_CLK0M PIU1000H3 PIJP10L040
D2
PIU1000D2 CSI_D1P
H4 P3.3V_DELAYED COQ10L
Q10L NLLCD0VCC0SW
LCD_VCC_SW 41
DSI_CLK0P PIU1000H4 PIJP10L041
1
PIQ10L01 8 LCD_VCC_SW 42
S D PIQ10L08 PIJP10L042
0.1uF, 6.3V, X5R
4.7uF, 10V, X5R, 10%
B E1
PIU1000E1 G2 2 7 43 B
CSI_D2M DSI_D0M PIU1000G2 PIQ10L02 S P D PIQ10L07 PIJP10L043
E2
PIU1000E2
CSI_D2P
G1
DSI_D0P PIU1000G1
3
PIQ10L03
S
6
D PIQ10L06
PIC12L01 PIC13L01 44
PIJP10L044
NVCC_MIPI
COR11L
R11L 4 5 COC12L
C12L COC13L
C13L 45
PIR11L02 PIR11L01 PIQ10L04 G D PIQ10L05 PIJP10L045
F2
PIU1000F2 CSI_D3M DSI_D1M
H2
PIU1000H2 100k, 1% PIC12L02 PIC13L02 NLUSB0VID0P5V
USB_VID_P5V 46
PIJP10L046
F1
PIU1000F1 CSI_D3P
H1 Si4435DY NLUSB0VID0N
USB_VID_N 47
DSI_D1P PIU1000H1 PIJP10L047
COC14L
C14L NLUSB0VID0P
USB_VID_P 48
PIJP10L048
PIC14L01 PIC14L02 GND 49
PIJP10L049
NLCSI0REXT
CSI_REXT D4 G4 NLDSI0REXT
DSI_REXT 50
PIU1000D4 CSI_REXT DSI_REXT PIU1000G4
1.0uF, 25V, 20% X5R
PIJP10L050
voltage range compatible with most LED backlit displays backlight power 51
PIJP10L051
PIR13L01COR13L PIR14L01COR14L COQ11L
Q11L note: high (6-18V) voltage! 52
PIJP10L052
R13L R14L PIR15L01 NLBATT0PWR
BATT_PWR 1
PIQ11L01 S
8
D PIQ11L08
LCD_BL_VDD NLLCD0BL0VDD
LCD_BL_VDD 53
PIJP10L053
22uF, 25V, X5R, 10%
6.04k, 1% 6.04k, 1% COR15L
R15L 2 7 54
PIQ11L02 S P D PIQ11L07 PIJP10L054
PIR13L02 PIR14L02
0.1uF, 25V, X5R
10k, 1% 3 6
COR16L PIQ11L03 S D PIQ11L06
PIR15L02 R16L
PIR16L02 PIR16L01
4
PIQ11L04 G
5
D PIQ11L05
PIC17L01 PIC18L01
PIQ12L03 10k, 1% COC17L
C17L COC18L
C18L
3
GND GND Si4435DY PIC17L02 PIC18L02
NLLCD0PWR0CTL
LCD_PWR_CTL 1 COQ12L
Q12L PIR17L02 COC19L
C19L GND
PIQ12L01
PIR18L02 2N7002W COR17L
R17L PIC19L01 PIC19L02
COR18L
R18L 49.9, 1%
PIQ12L0
2
100k, 1% PIR17L01 1.0uF, 25V, 20% X5R COU10L
U10L
PIR18L01 PIR19L01COR19L P5.0V_DELAYED RT9706
R19L 4
PIU10L04 VIN
GND
PIQ13L03 10k, 1% GND 5
VOUT PIU10L05
USB_VID_P5V
3
10uF, 10V, X5R, 20%
GND PIR19L02 R16L, R19L must divide BATT_PWR to protect Si4435DY 20V Vgs NLUSB0PWREN50N
USB_PWREN5_N 1 P3.3V_DELAYED
PIU10L01 EN
1 COQ13L
Q13L
PIQ14L03 Also means BATT_PWR > 6V to turn-on transistor
FLG
3 NLUSB0OVERCUR50N
USB_OVERCUR5_N
3
PIQ13L01 PIU10L03
1.0uF, 25V, 20% X5R
2N7002W
COQ14L
2
PIU10L02 GND
PIR12L02COR12L
PIC15L01
PIQ13L02 1 Q14L R12L
2
PIQ14L01
2N7002W COC15L
C15L PIC16L01 10k, 1%
PIC15L02 COC16L PIR12L01
PIQ14L02 C16L
2
PIC16L02
GND
active pull-down in off state
to ensure LCD circuitry reset GND GND
HDMI-A connector
C P3.3V Note leakage point on 3.3V line C
HDMI ESD (but, buffer prevents trivial attack on PMIC from HDMI port) Matched Net Lengths [Tolerance = 2mil]
D10L
COD10L PIR3 L01
RCLAMP0524P PIR20L01COR20L R33L
COR33L
PIQ19L03 PCB Rule
3
CEC 1PID10L01 IO1A IO1B 10 CEC R20L 4.7k, 1% i COJ10L
J10L
PID10L010
VDDSOC_CAP DDC_SCL_HV 2PID10L02 IO2A IO2B 9 DDC_SCL_HV 1.8k, 1% PIR3 L02 1 COQ19L
Q19L TX0_TMDS2_P
NLTX00TMDS20P
PID10L09 PIQ19L01 HDMI_TX i PIJ10L01 1
0.1uF, 6.3V, X5R
4.7uF, 10V, X5R, 10%
PIR20L02 BSS138
PIQ15L03 PIJ10L02 2
3
PIC20L 1 PIC21L01 COU100I
U100I NLTX00TMDS20N
3PID10L03 GND1
PIQ19L02 Use P3.3V for P/Us because DDC lines are shared with PMIC lines
HDMI_TX i
TX0_TMDS2_N
3
2
PIJ10L03
C20L
COC20L C21L
COC21L iMX6Q - MCIMX6Q5EYM12AC NLDDC0SCL
DDC_SCL 1 Q15L
COQ15L (why this is recommended by Freescale, I don't know) NLTX00TMDS10P
TX0_TMDS1_P
PIQ15L01 HDMI_TX i PIJ10L04 4
PIC20L 2 PIC21L02 i.MX6Q - HDMI DDC_SDA_HV 4PID10L04 IO3A IO3B 7
PID10L07
DDC_SDA_HV BSS138 P3.3V PIJ10L05 5
HDMI_HPD 5PID10L05 IO4A IO4B 6
PID10L06
HDMI_HPD
PIQ15L02 HDMI_TX i
TX0_TMDS1_N
NLTX00TMDS10N PIJ10L06 6
2
K1
HDMI_HPD PIU1000K1
HDMI_HPD_CPU PIC10L 1 HDMI_TX i
TX0_TMDS0_P
NLTX00TMDS00P
PIJ10L07 7
GND COC10L
C10L P5.0V_DELAYED PIJ10L08 8
L7
PIU1000L7 HDMI_VP HDMI_DDCCEC
K2
PIU1000K2 D11L
COD11L
PIC10L 2 0.1uF, 6.3V, X5R
HDMI_TX i
NLTX00TMDS00N
TX0_TMDS0_N PIJ10L09 9
RCLAMP0524P NLHDMI0HPD0CPU
HDMI_HPD_CPU GND PIR21L01COR21L PIR2 L01COR22L HDMI_TX i
NLTX00TMDS30P
TX0_TMDS3_P PIJ10L010 10
TX0_TMDS3_N 1PID11L01 IO1A IO1B 10 TX0_TMDS3_N R21L R22L
PCB Rule i PID11L010 i PCB Rule 1.8k, 1% 1.8k, 1% PIJ10L011 11
M7
PIU1000M7 HDMI_VPH
J5 TX0_TMDS3_P 2PID11L02 IO2A IO2B 9 TX0_TMDS3_P TX0_TMDS3_N
NLTX00TMDS30N
HDMI_CLKM PIU1000J5 PID11L09 HDMI_TX i NLCECPIR31L02COR31L
R31L PIJ10L012 12
J6
HDMI_CLKP PIU1000J6
GND PIR21L02 PIR2 L02 CEC PIR31L01 PIJ10L013 13
VDD_HIGH_CAP Matched Net Lengths [Tolerance = 40mil]
3 Matched Net Lengths [Tolerance = 2mil]
PID11L03
GND1
100, 1% PIJ10L014 14
PIR27L01COR27L PIR28L01COR28L PIR23L01COR23L PIQ16L01
0.1uF, 6.3V, X5R
4.7uF, 10V, X5R, 10%
K5 NLDDC0SCL0HV
DDC_SCL_HV
HDMI_D0M PIJ10L015 15
0 ohm
1
PIU1000K5
PIC2 L01 COC22L
C22L
PIC23L01 COC23L
C23L HDMI_D0P
K6
PIU1000K6
TX0_TMDS0_N 4PID11L04 IO3A IO3B 7
PID11L07
TX0_TMDS0_N R27L R28L
0 ohm (DNP)
R23L
1.8k, 1%
NLDDC0SDA0HV
DDC_SDA_HV PIJ10L016 16
HDMI_REF
NLHDMI0REF J1
PIU1000J1 HDMI_REF
TX0_TMDS0_P 5PID11L05 IO4A IO4B 6
PID11L06
TX0_TMDS0_P PIJ10L017 17
PIC2 L02 PIC23L02 HDMI_D1M
J3
PIU1000J3 PIR27L02 PIR28L02 DDC_SDA PIR23L02
NLDDC0SDA 2
PIQ16L02
3
PIQ16L03
TX_HDMI_5V
NLTX0HDMI05V
COR32L PIJ10L018 18
PIR24L02 J4 COQ16L
Q16L NLHDMI0HPD PIR32L02R32L
HDMI_HPD
HDMI_D1P PIJ10L019 19
1.6k, 1%
PIU1000J4 PIR32L01
R24L
COR24L COD12L
D12L BSS138 330, 1% PIJ10L00 GND
GND K3
HDMI_D2M PIU1000K3
RCLAMP0524P can't use 2N7002 here b/c Vth is too high PIR25L01
PIR24L01 K4
HDMI_D2P PIU1000K4
TX0_TMDS1_N 1 IO1A
PID12L01
IO1B 10
PID12L010
TX0_TMDS1_N P3.3V_DELAYED P3.3V_DELAYED R25L
COR25L
AUK HDM19SW-4-L2-1R3HHCN
TX0_TMDS1_P 2 IO2A IO2B 9 TX0_TMDS1_P
PID12L02 PID12L09 47k, 1%
PIR29L01 PIR30L 1
3PID12L03 GND1 R29L
COR29L R30L
COR30L HDMI +5V fuse GND
GND 1k, 1% 10k, 1%
PID13L01 PIR25L02
1
TX0_TMDS2_N 4 IO3A
PID12L04
IO3B 7
PID12L07
TX0_TMDS2_N PIR29L02 PIR30L 2 P5.0V_DELAYED
COD13L
D13L
TX0_TMDS2_P 5 IO4A IO4B 6 TX0_TMDS2_P HDMI_HPD_LV
NLHDMI0HPD0LV HDMI_HPD_LV_N
NLHDMI0HPD0LV0N F10L
COF10L
PID12L05 PID12L06 i PCB Rule RSA5M
PIQ17L03 PIQ18L03 1 2
3
3
PIF10L01 PIF10L02
Q17L
COQ17L Q18L
COQ18L
Matched Net Lengths [Tolerance = 40mil] 1 2N7002W 1 2N7002W HDMI_HPD 0ZCA0005FF2E
PID13L02
2
PIQ17L01 PIQ18L01
LAYOUT: PLACE ESD IN SERIES TO ELIMINATE STUBS INFO: 50MA hold
D RUN TRACES STRAIGHT UNDER ESD WITHOUT VIAS
PIQ17L02 PIQ18L02 150MA TRIP
D
2
2
No HPD polarity select in software
LAYOUT: ROUTE HDMI_TX* AND TX* SHORT, STRAIGHT, So, hardware buffering required
AND WITHOUT VIAS. ROUTE PAIRS WITH
100 OHM DIFFERENTIAL IMPEDANCE.
Copyright 2014 Andrew "bunnie" Huang
Title
Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 C
Date: 7/5/2014 Sheet of
File: F:\largework\..\13hdmi_lcd.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
10uF, 10V, X5R, 20%
0.1uF, 6.3V, X5R
COR22A
R22A COR23A
R23A
0.01uF, 10V, X5R, 10%
PIR22A01 PIR22A02
PIC35A02 PIC36A01
PIR23A01 PIR23A02 COR24A P1.8V_VGEN3
R24A
Microphone configured for pseudo-differential operation 2.2k, 1% 1k, 1% PIR24A01 PIR24A02 note: reprogram in BSP to 3.0V for micbias use, in case AUD_P3.3V is too noisy
P3.3V_DELAYED COC35A
C35A COC36A
C36A 0 ohm (DNP)
MIC_CABLE PIC35A01 PIC36A02
PIR10B02 PIR1 B02 PIC37A01
10uF, 10V, X5R, 20%
AUD_P3.3V
1k, 1%
COR10B
R10B COR11B
R11B COC37A
C37A COR25A
R25A
1k, 1%
0.1uF, 6.3V, X5R
PIR25A01 PIR25A02
PIC37A02 0 ohm
PIR10B 1 PIR1 B01 PIC10A 2 PIC1 A01
10uF, 10V, X5R, 20%
NLI2C30SCL
I2C3_SCL
COR26A
R26A COC10A
C10A COC11A
C11A
0.1uF, 6.3V, X5R
PIR26A02 PIR26A01
A 330, 1% PIC10A01 PIC1 A02 A
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
COR27A HP_VGND_EMI PIC12A02 PIC13A01
NLI2C30SDA
I2C3_SDA R27A PIC38A02 PIC39A02 COC12A
C12A COC13A
C13A
PIR27A02 PIR27A01 COR28A COR10A
GND COC38A
C38A COC39A
C39A PIC12A01 PIC13A02 NLKEY0ROW1
KEY_ROW1 R28A R10A P5.0V_DELAYED
330, 1% PIR28A01 PIR28A02 PIR10A02 PIR10A01
AUD_P3.3V PIC38A01 PIC39A01 0 ohm 20k, 1%
COP10A
P10A
PIR1 A02
1.0uF, 25V, 20% X5R
GND COU10A
U10A NLSPK0L0P
SPK_L_P
COR11A
R11A NLAUD0PWRON COR30A
R30A NLAUD0PA0SHDN NLSPK0L0N PIP10A02 2
AUD_PWRON AUD_PA_SHDN 1 8 SPK_L_N
PIR30A01 PIR30A02 PIU10A01 SHDWN VO2 PIU10A08 PIP10A01 1
2200pF, X7R, 50V, 10%
2200pF, X7R, 50V, 10%
AUD_P3.3V NLAUD0I2C30SDA
AUD_I2C3_SDA 10k,NLMIC0DIFF0P
1%
MIC_DIFF_P 2 7
0 ohm (DNP)
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PIU10A02 BYP GND PIU10A07
PIR1 A01 NLMIC0DIFF0N
MIC_DIFF_N 3
PIU10A03 +IN VDD
6
PIU10A06 JST B2B-EH-A
PIC14A02 PIC15A02 NLAUD0I2C30SCL
AUD_I2C3_SCL PIC16A02 PIC17A01 COR12A
R12A 4 5 PIC18A02
PIR12A02 PIR12A01 PIU10A04 -IN VO1 PIU10A05
10uF, 10V, X5R, 20%
COC14A
C14A COC15A
C15A PIC40A02 PIC41A02 COC16A
C16A COC17A
C17A COC18A
C18A
COC40A COC41A 20k, 1%
PIC14A01 PIC15A01 C40A C41A
PIU1A029 PIU1A028 PIU1A027 PIU1A026 PIU1A025 PIU1A024 PIU1A023 PIU1A02 PIC16A01 PIC17A02 NSIWAY NS4890B PIC18A01 1.0uF, 25V, 20% X5R
29
28
27
26
25
24
23
22
PIC40A01 PIC41A01 COU11A
U11A PIC19A02
1.0uF, 25V, 20% X5R
GND Everest ES8328E COC19A
C19A
DACREF
LIN1
RIN1
LIN2
PAD
CDATA
CE
CCLK
GND NLAUD0MCLK
AUD_MCLKPIU11A01
1
MCLK RIN2
21
PIU11A021 GND PIR3 A02 PIC19A01 1.0uF, 25V, 20% X5R GND
AUD_P3.3V 2 20 NLAUD0VMID
AUD_VMID COR33A
R33A
0.1uF, 6.3V, X5R
PIU11A02 DVDD VMID PIU11A020
1.0uF, 25V, 20% X5R
3 19 NLAUD0VREF
AUD_VREF AUD_P3.3V 100k, 1%
PIC20A02 PIC21A02 PIU11A03 PVDD ADCVREF PIU11A019
PIR3 A01
4 18 AUD_P3.3V GND
0.1uF, 6.3V, X5R
COC20A
C20A COC21A
C21A NLAUD0CLK PIU11A04 DGND AGND PIU11A018
AUD_CLK PIU11A05
5 17 Note: TS4990IST can be substituted for NS4890
0.1uF, 6.3V, X5R
ASDOUT
PIC20A01 PIC21A01 NLAUD0DOUT SCLK AVDD PIU11A017
PIC2 A02 PIC23A01
AUD_DOUTPIU11A06
6 16
HPGND
ALRCK
ROUT1
ROUT2
LOUT1
DSDIN HPVDD PIU11A016
PIC24A02 PIC25A02
10uF, 10V, X5R, 20%
NLAUD0LRCLK COC22A COC23A
OUT3
AUD_LRCLK 7 15 C22A C23A GND
PIU11A07 DLRCK LOUT2 PIU11A015
COC24A
C24A COC25A
C25A PIC2 A01 PIC23A02
B
GND GND PIC24A01 PIC25A01 COR13A
R13A B
PIU1 A08 PIU1 A09 PIU1A01 PIU1A01 PIU1A012 PIU1A013 PIU1A014 PIR13A02 PIR13A01 P5.0V_DELAYED
8
9
10
11
12
13
14
GND 20k, 1%
NLAUD0DIN
AUD_DIN GND GND COP11A
P11A
NLAUD0ALRCK
AUD_ALRCK COU12A
U12A NLSPK0R0P
SPK_R_P PIP11A02 2
1 8 NLSPK0R0N
SPK_R_N
PIU12A01 SHDWN VO2 PIU12A08 PIP11A01 1
P3.3V_DELAYED 2 7
PIU12A02 BYP GND PIU12A07
COC26A
C26A 3
PIU12A03 +IN
6 JST B2B-EH-A
PIR29A02 NLCN0L0SPK0LINE COR14A
R14A VDD PIU12A06
PIC27A02
CN_L_SPK_LINE 4
PIU12A04 -IN
5
COR29A
R29A
PIC26A01 PIC26A02 PIR14A02 PIR14A01 VO1 PIU12A05
COC27A
C27A
GND 20k, 1%
100, 1% (DNP) 10uF, 10V, X5R, 20% NSIWAY NS4890B PIC27A01 1.0uF, 25V, 20% X5R
PIR29A01 COC28A
C28A PIC29A02 COC29A
HP_R_PRE
HP_L_PRE
AUD_MCLK NLCN0R0SPK0LINE
CN_R_SPK_LINE C29A
PIR32A02
PIR32A01
COR32A
R32A
100, 1% (DNP)
NLHP0R ENLHP0LPRE PIC28A01 PIC28A02
10uF, 10V, X5R, 20%
AUD_P3.3V
PIC29A01
GND
1.0uF, 25V, 20% X5R GND
COL10A
L10A
PIR15A02
GND COC30A
C30A COR15A
R15A
1PIC30A01 PIC30A02 100k, 1%
PIL10A01 PIL10A02
BLM18KG121 PIR15A01
220uF, 10V, VS D3A 120 ohm NLMIC0CABLE 4 COJ12A
MIC_CABLE J12A
PIJ12A04
5PIJ12A05
C NLHPR0EMI
HPR_EMI 3PIJ12A03 C
Power management switch for audio circuit NLAUD0HP0IN
AUD_HP_IN COR16A
R16A NLHP0IN
HP_IN 2PIJ12A02
PIR16A02 PIR16A01
47k, 1% COL11A
L11A NLHPL0EMI
HPL_EMI 1PIJ12A01
COR17A
R17A
COC31A
C31A PIR18A01 CUI SJ-43515TS-SMT
PIR17A01 PIR17A02
1
PIC31A01 PIC31A02 PIL11A01 PIL11A02
COR18A
R18A
COC32A
C32A 10k, 1% PIQ10A 3 BLM18KG121 10k, 1%
3
PIC32A02 PIC32A01
COQ10A
Q10A COL12A
L12A
220uF, 10V, VS D 3A 120 ohm PIR18A02
1 2N7002W
PIQ10A01
AUD_PWRON
0.1uF, 6.3V, X5R PIR19A01 PIL12A01 PIL12A02 COL13A
L13A
PIQ10A2 COR19A
R19A BLM18KG121 GND
2
COR20A
R20A 68k, 1% HP_VGND_EMI
NLHP0VGND0EMI
3A 120 ohm (DNP)
0.1uF, 25V, X5R
PIR20A02 PIR20A01 PIL13A01 PIL13A02
100k, 1% PIR19A02 BLM18KG121
PIQ1 A01 PIC34A02 PID10A 1 PID1 A01 PID12A01 PID13A01 PID14A01
ESD5Z3.3T1
ESD5Z3.3T1
ESD5Z3.3T1
ESD5Z3.3T1
ESD5Z3.3T1
3A 120 ohm
1
1
1
1
1
1
P3.3V_DELAYED GND COC34A
C34A GND
AUD_P3.3V GND PIC34A01 COD10A
D10A COD11A
D11A COD12A
D12A COD13A
D13A COD14A
D14A
2 3
PIQ11A02 PIQ11A03
Q11A
COQ11A PIR21A01
FDN304P R21A
COR21A GND
PID10A 2 PID1 A02 PID12A0 PID13A02 PID14A02
2
2
2
2
2
20 ohms, 1%
PIR21A02
PIQ12A03
3
COQ12A
Q12A GND
1 2N7002W
PIQ12A01
D
PIQ12A0 Copyright 2014 Andrew "bunnie" Huang
D
2
active pulldown
to ensure audio codec reset Title
GND Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 B
Date: 7/5/2014 Sheet of
File: F:\largework\..\14audio.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
1.0uF, 25V, 20% X5R
1.0uF, 25V, 20% X5R
10uF, 10V, X5R, 20%
10uF, 10V, X5R, 20%
P3.3V_DELAYED P3.3V_DELAYED P1.5V_DDR_SW3 P3.3V_DELAYED
COR12F
R12F COR13F
R13F
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
PIR12F01 PIR12F02 PIR13F01 PIR13F02
4.7k, 1% (DNP) 4.7k, 1% CCLK P3.3V_DELAYED default to slave serial mode PIC10F 1 COC10F
PIC1 F01 COC11F
PIC12F01 COC12F
PIC13F01 COC13F
PIC14F01 COC14F
PIC15F01 COC15F
PIC16F01 COC16F
PIC17F01 COC17F
PIC18F01 COC18F
PIC19F01 COC19F
PIC20F 2 COC20F
PIC21F01 COC21F
PIC2 F01 COC22F
PIC23F01 COC23F
PIC24F01 COC24F
PIC25F01 COC25F
PIC26F01 COC26F
PIC27F01 COC27F
PIC28F01 COC28F
PIC29F01 COC29F
PIC30F 2 COC30F
PIC31F01 COC31F
COU800A
U800A GND COU800C
U800C i C10F C11F C12F C13F C14F C15F C16F C17F C18F C19F C20F C21F C22F C23F C24F C25F C26F C27F C28F C29F C30F C31F
NLFPGA0HSWAPEN NLECSPI30SCLK COR14F
R14F PIC10F 2 PIC1 F02 PIC12F02 PIC13F02 PIC14F02 PIC15F02 PIC16F02 PIC17F02 PIC18F02 PIC19F02 PIC20F 1 PIC21F02 PIC2 F02 PIC23F02 PIC24F02 PIC25F02 PIC26F02 PIC27F02 PIC28F02 PIC29F02 PIC30F 1 PIC31F02
D4
PIU8000D4 FPGA_HSWAPEN R15
PIU8000R15 ECSPI3_SCLK prog PIR14F01 PIR14F02
IO_L1P_HSWAPEN_0 NLEIM0DA14 IO_L1P_CCLK_2 NLFPGA0M0
BANK 0
BANK 2
0.1uF, 6.3V, X5R
C4
PIU8000C4 EIM_DA14 T15
PIU8000T15 FPGA_M0 4.7k, 1%
IO_L1N_VREF_0 IO_L1N_M0_CMPMISO_2 NLF0LVDS140P PIC4 F01
B2 U16 F_LVDS14_P
IO_L2P_0 PIU8000B2
IO_L2P_CMPCLK_2 PIU8000U16
NLF0LVDS140N COR15F
R15F COC44F
C44F
A2 ECSPI3_MOSI V16 F_LVDS14_N GND GND GND
IO_L2N_0 PIU8000A2 IO_L2N_CMPMOSI_2 PIU8000V16
NLECSPI30MOSI
PIR15F01 PIR15F02
PIC4 F02
D6
PIU8000D6 R13
PIU8000R13 ECSPI3_MOSI prog 4.7k, 1% (DNP) P3.3V_DELAYED P3.3V_DELAYED
IO_L3P_0 IO_L3P_D0_DIN_MISO_MISO1_2
C6
PIU8000C6 T13
PIU8000T13
IO_L3N_0 IO_L3N_MOSI_CSI_B_MISO0_2
1.0uF, 25V, 20% X5R
10uF, 10V, X5R, 20%
B3
PIU8000B3
NLECSPI30SS2
ECSPI3_SS2 T14
PIU8000T14
NLF0LVDS130P
F_LVDS13_P
IO_L4P_0
A3 NLECSPI30MISO
ECSPI3_MISO
IO_L12P_D1_MISO2_2
V14 NLF0LVDS130N
F_LVDS13_N
COR16F
R16F COU800F
U800F
PIU8000A3 PIU8000V14 PIR16F01 PIR16F02
IO_L4N_0 NLAUD60TXC IO_L12N_D2_MISO3_2 NLFPGA0M1 prog COU800G
B4 AUD6_TXC N12 FPGA_M1 4.7k, 1% P3.3V_DELAYED B10 B1 U800G
IO_L5P_0 PIU8000B4 IO_L13P_M1_2 PIU8000N12 PIU8000B10 VCCO_0 VCCAUX PIU8000B1
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
A4 NLAUD60TFS
AUD6_TFS P12 B15 B17 A1 K10
IO_L5N_0 PIU8000A4
NLUSB0HUB10RST IO_L13N_D10_2 PIU8000P12
NLF0LVDS120P COR17F
R17F PIC32F01 PIC3 F01 PIC34F01 PIC35F01 PIC36F01 PIC37F01 PIC38F01 PIC39F01 PIC40F 2 PIC41F01 PIU8000B15 VCCO_0 VCCAUX PIU8000B17 PIU8000A1 GND GND PIU8000K10
C5
PIU8000C5 USB_HUB1_RST U13
PIU8000U13 F_LVDS12_P PIR17F01 PIR17F02 B5
PIU8000B5 E14 A18 K8
A IO_L6P_0 NLECSPI30RDY IO_L14P_D11_2 NLF0LVDS120N COC32F
C32F COC33F
C33F COC34F
C34F COC35F
C35F COC36F
C36F COC37F
C37F COC38F
C38F COC39F
C39F COC40F
C40F COC41F
C41F VCCO_0 VCCAUX PIU8000E14 PIU8000A18 GND GND PIU8000K8 A
A5
PIU8000A5 ECSPI3_RDY V13
PIU8000V13 F_LVDS12_N 4.7k, 1% (DNP) D13
PIU8000D13 E5 B13 L11
IO_L6N_0 NLEIM0DA15 IO_L14N_D12_2 NLF0LVDS110P PIC32F02 PIC3 F02 PIC34F02 PIC35F02 PIC36F02 PIC37F02 PIC38F02 PIC39F02 PIC40F 1 PIC41F02 VCCO_0 VCCAUX PIU8000E5 PIU8000B13
GND GND PIU8000L11
B6
PIU8000B6 EIM_DA15 R11
PIU8000R11 F_LVDS11_P D7
PIU8000D7 E9 B7 L9
IO_L8P_0 NLAUD60TXD IO_L16P_2 NLF0LVDS110N VCCO_0 VCCAUX PIU8000E9 PIU8000B7
GND GND PIU8000L9
A6 AUD6_TXD T11 F_LVDS11_N E10 G10 C16 M17
IO_L8N_VREF_0 PIU8000A6
NLEIM0DA12 IO_L16N_VREF_2 PIU8000T11
NLF0LVDS100P
PIU8000E10 VCCO_0 VCCAUX PIU8000G10 PIU8000C16 GND GND PIU8000M17
C7 EIM_DA12 U11 F_LVDS10_P GND P1.5V_DDR_SW3 J12 C3 M2
IO_L10P_0 PIU8000C7 IO_L23P_2 PIU8000U11 VCCAUX PIU8000J12 PIU8000C3 GND GND PIU8000M2
10uF, 10V, X5R, 20%
1.0uF, 25V, 20% X5R
A7
PIU8000A7 NLEIM0WAIT
EIM_WAIT V11
PIU8000V11 NLF0LVDS100N
F_LVDS10_N GND E17
PIU8000E17 K7 D10 M6
IO_L10N_0 NLEIM0DA9 IO_L23N_2 NLF0LVDS0CK10P VCCO_1 VCCAUX PIU8000K7 PIU8000D10 GND GND PIU8000M6
D8
PIU8000D8 EIM_DA9 R10
PIU8000R10 F_LVDS_CK1_P G15
PIU8000G15 M9 D5 N13
IO_L11P_0 NLEIM0DA11 IO_L29P_GCLK3_2 NLF0LVDS0CK10N VCCO_1 VCCAUX PIU8000M9 PIU8000D5
GND GND PIU8000N13
keep EIM wires as short as possible
C8
PIU8000C8 EIM_DA11 T10
PIU8000T10 F_LVDS_CK1_N P3.3V_DELAYED J14
PIU8000J14 P10 E15 R1
IO_L11N_0 NLEIM0DA8 IO_L29N_GCLK2_2 NLF0LVDS150P VCCO_1 VCCAUX PIU8000P10 PIU8000E15
GND GND PIU8000R1
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
B8 EIM_DA8 U10 F_LVDS15_P J17 P14 G12 R14
IO_L33P_0 PIU8000B8 IO_L30P_GCLK1_D13_2 PIU8000U10 PIU8000J17 VCCO_1 VCCAUX PIU8000P14 PIU8000G12 GND GND PIU8000R14
IO_L33N_0
A8
PIU8000A8
NLEIM0DA7
EIM_DA7
IO_L30N_GCLK0_USERCCLK_2
V10
PIU8000V10
NLF0LVDS150N
F_LVDS15_N PIC42F01 COC42F
PIC43F01 COC43F
PIC45F01 COC45F
PIC46F01 COC46F
PIC47F01 COC47F
PIC48F01 COC48F
PIC49F02 COC49F
PIC50F 1 COC50F
M15
PIU8000M15 VCCO_1
P5
VCCAUX PIU8000P5
G17
PIU8000G17 GND GND
R18
PIU8000R18
D9
PIU8000D9 ECSPI3_SCLK R8
PIU8000R8 NLF0LVDS0CK00P
F_LVDS_CK0_P C42F C43F C45F C46F C47F C48F C49F C50F R17
PIU8000R17 P1.2V G2
PIU8000G2 R4
PIU8000R4
IO_L34P_GCLK19_0 NLEIM0BCLK IO_L31P_GCLK31_D14_2 NLF0LVDS0CK00N PIC42F02 PIC43F02 PIC45F02 PIC46F02 PIC47F02 PIC48F02 PIC49F01 PIC50F 2 VCCO_1 GND GND
IO_L34N_GCLK18_0 PIU8000C9 EIM_BCLK
C9
IO_L31N_GCLK30_D15_2
T8
PIU8000T8 F_LVDS_CK0_N P3.3V_DELAYED G7
VCCINT PIU8000G7
G5
PIU8000G5 GND GND
R9
PIU8000R9
B9
PIU8000B9
NLEIM0DA3
EIM_DA3 T9
PIU8000T9
NLF0LVDS90P
F_LVDS9_P P9
PIU8000P9 H11 H10 T16
IO_L35P_GCLK17_0 NLEIM0DA6 IO_L32P_GCLK29_2 NLF0LVDS90N VCCO_2 VCCINT PIU8000H11 PIU8000H10
GND GND PIU8000T16
A9 EIM_DA6 V9 F_LVDS9_N R12 H9 H8 U12
IO_L35N_GCLK16_0 PIU8000A9
IO_L32N_GCLK28_2 PIU8000V9 PIU8000R12
VCCO_2 VCCINT PIU8000H9 PIU8000H8
GND GND PIU8000U12
1.0uF, 25V, 20% X5R
10uF, 10V, X5R, 20%
D11 NLEIM0DA10
EIM_DA10 U8 NLF0LVDS80P
F_LVDS8_P GND R6 J10 J11 U6
IO_L36P_GCLK15_0 PIU8000D11
NLEIM0DA13 IO_L41P_2 PIU8000U8
NLF0LVDS80N
PIU8000R6 VCCO_2 VCCINT PIU8000J10 PIU8000J11 GND GND PIU8000U6
C11 EIM_DA13 V8 F_LVDS8_N U14 J8 J15 V1
IO_L36N_GCLK14_0 PIU8000C11
NLEIM0OE IO_L41N_VREF_2 PIU8000V8
NLF0LVDS70P
PIU8000U14 VCCO_2 VCCINT PIU8000J8 PIU8000J15 GND GND PIU8000V1
IO_L37P_GCLK13_0 PIU8000C10 EIM_OE
C10
IO_L43P_2
U7
PIU8000U7 F_LVDS7_P P1.2V U4
PIU8000U4 VCCO_2
K11
VCCINT PIU8000K11
J4
PIU8000J4 GND GND
V18
PIU8000V18
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
A10
PIU8000A10
NLEIM0DA1
EIM_DA1 V7
PIU8000V7
NLF0LVDS70N
F_LVDS7_N U9
PIU8000U9 K9
PIU8000K9 J9
PIU8000J9
IO_L37N_GCLK12_0 NLEIM0DA0 IO_L43N_2 NLF0LVDS60P VCCO_2 VCCINT GND
IO_L38P_0
G9
PIU8000G9 EIM_DA0
IO_L45P_2
T6
PIU8000T6 F_LVDS6_P PIC51F01 PIC52F01 PIC53F01 PIC54F01 PIC5 F01 PIC56F01 PIC57F01 PIC58F01 PIC59F01 PIC60F 2 PIC61F01 VCCINT
L10
PIU8000L10
F9 NLEIM0DA2
EIM_DA2 V6 NLF0LVDS60N
F_LVDS6_N COC51F
C51F COC52F
C52F COC53F
C53F COC54F
C54F COC55F
C55F COC56F
C56F COC57F
C57F COC58F
C58F COC59F
C59F COC60F
C60F COC61F
C61F E2 L8
IO_L38N_VREF_0 PIU8000F9 IO_L45N_2 PIU8000V6 PIU8000E2 VCCO_3 VCCINT PIU8000L8
IO_L39P_0
B11
PIU8000B11
NLEIM0CS0
EIM_CS0
IO_L46P_2
R7
PIU8000R7
NLF0LVDS50P
F_LVDS5_P PIC51F02 PIC52F02 PIC53F02 PIC54F02 PIC5 F02 PIC56F02 PIC57F02 PIC58F02 PIC59F02 PIC60F 1 PIC61F02 PIU8000G4
G4
VCCO_3 VCCINT
M12
PIU8000M12
XC6SLX45-3CSG324C
A11
PIU8000A11 NLEIM0A16
EIM_A16 T7
PIU8000T7 NLF0LVDS50N
F_LVDS5_N J2
PIU8000J2 M7
IO_L39N_0 NLEIM0A17 IO_L46N_2 NLF0LVDS40P VCCO_3 VCCINT PIU8000M7
B12
PIU8000B12 EIM_A17 R5
PIU8000R5 F_LVDS4_P J5
PIU8000J5 GND
IO_L41P_0 NLUIM0DATA IO_L48P_D7_2 NLF0LVDS40N VCCO_3
A12
PIU8000A12 UIM_DATA T5
PIU8000T5 F_LVDS4_N GND M4
PIU8000M4
IO_L41N_0 NLEIM0LBA IO_L48N_RDWR_B_VREF_2 NLF0LVDS30P VCCO_3
B14 EIM_LBA U5 F_LVDS3_P R2 GND
IO_L62P_0 PIU8000B14
NLUIM0PWRON IO_L49P_D3_2 PIU8000U5
NLF0LVDS30N 1.23V FPGA Vcore regulator - up to 2A
PIU8000R2 VCCO_3
A14 UIM_PWRON V5 F_LVDS3_N 1.23V enables extended MCB performance range
IO_L62N_VREF_0 PIU8000A14
NLEIM0DA5 IO_L49N_D4_2 PIU8000V5
NLF0LVDS20P
F13
PIU8000F13 EIM_DA5 R3
PIU8000R3 F_LVDS2_P P5.0V_DELAYED pin-compatible downgrade to LMR10510 / MSS5121 / CDBM140-G and half-value caps for 1A
IO_L63P_SCP7_0 IO_L62P_D5_2
E13
PIU8000E13 NLEIM0DA4
EIM_DA4 T3
PIU8000T3 NLF0LVDS20N
F_LVDS2_N P3.3V_DELAYED XC6SLX45-3CSG324C
IO_L63N_SCP6_0
C15 NLUIM0RESET
UIM_RESET
IO_L62N_D6_2
T4 NLF0LVDS10P
F_LVDS1_P PIR20F 2 COR18F
R18F COR19F
R19F
PIU8000C15 PIU8000T4 PIR18F02 PIR18F01 PIR19F02 PIR19F01
IO_L64P_SCP5_0 NLEIM0CS1 IO_L63P_2 NLF0LVDS10N COR20F COU800H
IO_L64N_SCP4_0
A15
PIU8000A15 EIM_CS1
IO_L63N_2
V4
PIU8000V4 F_LVDS1_N PIR21F01 R20F 10k, 1% 10.5k, 1% P1.2V U800H P3.3V_DELAYED
D14 NLEIM0A18
EIM_A18 N5 NLF0LVDS00P
F_LVDS0_P COR21F
R21F 10k, 1% F7 U15
IO_L65P_SCP3_0 PIU8000D14
NLEIM0RW IO_L64P_D8_2 PIU8000N5
NLF0LVDS00N 4.7k, 1% PIR20F 1 PIU8000F7 NC NC PIU8000U15
C14 EIM_RW P6 F_LVDS0_N GND E6 V15
IO_L65N_SCP2_0 PIU8000C14 IO_L64N_D9_2 PIU8000P6
PIR21F02 PIU8000E6 NC NC PIU8000V15 COR22F
R22F
B16 NLUIM0CLK
PIU8000B16 UIM_CLK U3
PIU8000U3 NLFPGA0INIT0N
FPGA_INIT_N prog COU10F
U10F E7
PIU8000E7 NC NC M11
PIU8000M11 P3.3V_DELAYED PIR22F01 PIR22F02
IO_L66P_SCP1_0 IO_L65P_INIT_B_2
IO_L66N_SCP0_0 PIU8000A16 FPGA_LED2
A16
IO_L65N_CSO_B_2
V3
PIU8000V3 6
PIU10F06 EN
1
FB PIU10F01 COL10F
L10F E8
PIU8000E8 NC NC
N11
PIU8000N11 4.7k, 1%
5
PIU10F05 VINA
2
GND PIU10F02
G8
PIU8000G8 NC NC
T12
PIU8000T12 PIR25F02
XC6SLX45-3CSG324C XC6SLX45-3CSG324C 4
PIU10F04 VIND
3 F8 V12 COR25F
R25F
SW PIU10F03 PIL10F01 PIL10F02 PIU8000F8 NC NC PIU8000V12
10uF, 10V, X5R, 20%
22uF, 6.3V, X5R, 20%
22uF, 6.3V, X5R, 20%
7 2.2uH, coilcraft MSS5131-222ML G11 N10 4.7k, 1%
High speed expansion notes: GND PIU10F07 PIC62F01 PIC63F01 PIU8000G11 NC NC PIU8000N10
PIR25F01
PID1F02 F10
PIU8000F10 NC NC
P11
PIU8000P11
2
B All power generation is local to expansion board PIC65F02 LMR10520YSDE COC62F
C62F COC63F
C63F F11 M10 COU800E
U800E B
F_LVDS_CK0_N
F_LVDS_CK0_P
COD11F
D11F PIU8000F11 NC NC PIU8000M10
Connects to 2x AD9286 or ISLA118P50 500MSPS 8-bit ADCs COC65F
C65F PIC62F02 PIC63F02 E11 N9 P3.3V_DELAYED NLFPGA0DONE
FPGA_DONE
V17
NC NC DONE_2
F_LVDS14_N
F_LVDS13_N
F_LVDS12_N
F_LVDS10_N
PIU8000E11 PIU8000N9 PIU8000V17
F_LVDS14_P
F_LVDS13_P
F_LVDS12_P
F_LVDS10_P
PIC65F01 CDBMT220L-G or CDBMT240-HF
PID1F01
F_LVDS9_N
F_LVDS8_N
F_LVDS5_N
F_LVDS6_N
F_LVDS3_N
F_LVDS7_N
8 LVDS pairs + clock in; LVDS[A,B] for OR; LVDSC for clockout D12 M8
F_LVDS9_P
F_LVDS8_P
F_LVDS5_P
F_LVDS6_P
F_LVDS3_P
F_LVDS7_P
PIU8000D12 NC NC PIU8000M8
1
DDC_SCL
SPI CLK,DIO,CS for config (use local inverter to generate 2x CS) C12
PIU8000C12 NC
N8 NLFPGA0RESET0NPIU8000V2
FPGA_RESET_N V2
NC PIU8000N8 PROGRAM_B_2
F_DX16
F_DX18
F_DX15
F_DX12
F_DX13
19 digital I/O total -- 3 for SPI leaves 16 for LA use GND C13 N7 COP10F
P10F NLFPGA0SUSPEND
FPGA_SUSPEND
R16
F_DX5
F_DX4
F_DX8
F_DX7
F_DX6
label pins on silk
PIU8000C13 NC NC PIU8000N7 PIU8000R16 SUSPEND
DDC_SDA/DDC_SCL for I2C config use GND A13
PIU8000A13 P8
PIU8000P8
NC NC 1 PIP10F01 NLFPGA0TCK
Badly matched F_DX*: F_DX14, F_DX17, F_DX18 - use for SPI F12 N6 FPGA_TCK A17
PIU8000F12 NC NC PIU8000N6 2 PIP10F02 NLFPGA0TDI PIU8000A17 TCK
Rest are matched to within 500 mil GND E12
PIU8000E12 NC
P7 FPGA_TDI D15
NC PIU8000P7 3 PIP10F03 NLFPGA0TDO PIU8000D15 TDI
FPGA_TDO D16
4 PIP10F04 NLFPGA0TMS PIU8000D16 TDO
PIJ10FB1 PIJ10FB2 PIJ10FB3 PIJ10FB4 PIJP10F B5 PIJ10FGND5 PIJ10FB6 PIJ10FB7 PIJ10FB8 PIJP10F B9 PIJ 10F B10 PIJ10FB1 PIJ10FB12 PIJ10FB13 PIJ 10F B14 PIJ10FB15 PIJ10FGND6 PIJ10FB16 PIJ10FB17 PIJ 10F B18 PIJ 10F B19 PIJ10FB20 PIJ10FB21 PIJ10FB2 PIJ 10F B23 PIJ 10F B24 PIJ10FB25 PIJ10FGND7 PIJ10FB26 PIJ10FB27 PIJ 10F B28 PIJ10FB29 PIJ10FB30 PIJ10FB31 PIJ 10F B32 PIJ 10F B3 PIJ10FB34 PIJ10FB35 PIJ10FGND8 PIJ10FB36 PIJ 10F B37 PIJ 10F B38 PIJ10FB39 PIJ10FB40 P5.0V_DELAYED
PIR35F01 P3.3V_DELAYED XC6SLX45-3CSG324C
5 PIP10F05
6 PIP10F06
FPGA_TMS B18
PIU8000B18 TMS
COJP10F
JP10F COC95F
C95F COR35F
R35F PIR23F02 P13
PIU8000P13 CMPCS_B_2
B1
B2
B3
B4
B5
GND5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
GND6
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
GND7
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
GND8
B36
B37
B38
B39
B40
FX10A-80S/8-SV(**) PIC95F01 PIC95F02
10k, 1% PIR36F01 Male 2.54mm 6x1 header COR23F
R23F
PIR35F02 COR36F
R36F 10k, 1%
COQ11F
Q11F 1.0uF, 25V, 20% X5R
PIQ12F03 10k, 1% P0.75V_REFDDR P1.5V_DDR_SW3 PIR23F01 XC6SLX45-3CSG324C
3
PIR36F02 COR10F
R10F
GND1
GND2
GND3
GND4
8
PIQ11F08 D
1 COQ12F
Q12F
S PIQ11F01
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
1.0uF, 25V, 20% X5R
R30F PIR10F01 PIR10F02
10uF, 10V, X5R, 20%
COR30F NLFPGA0EXP0ON PIR1 F01
7 2 1 FPGA_EXP_ON GND
A1
A2
A3
A4
A5
A6
A7
A8
A9
PIQ11F07 D P S PIQ11F02 PIR30F02 PIR30F01 PIQ12F01 0 ohm, 0805
6
PIQ11F06 D 3 100k, 1%
COR11F
R11F GND
S PIQ11F03 1k, 1% (DNP)
PIJ10FA1 PIJ10FA2 PIJ10FA3 PIJ10FA4 PIJP10F A5 PIJ10FGND1 PIJ10FA6 PIJ10FA7 PIJ10FA8 PIJP10F A9 PIJ 10F A10 PIJ10FA1 PIJ10FA12 PIJ10FA13 PIJ 10F A14 PIJ10FA15 PIJ10FGND2 PIJ10FA16 PIJ10FA17 PIJ 10F A18 PIJ 10F A19 PIJ10FA20 PIJ10FA21 PIJ10FA2 PIJ 10F A23 PIJ 10F A24 PIJ10FA25 PIJ10FGND3 PIJ10FA26 PIJ10FA27 PIJ 10F A28 PIJ10FA29 PIJ10FA30 PIJ10FA31 PIJ 10F A32 PIJ 10F A3 PIJ10FA34 PIJ10FA35 PIJ10FGND4 PIJ10FA36 PIJ 10F A37 PIJ 10F A38 PIJ10FA39 PIJ10FA40 5
PIQ11F05 D
4
G PIQ11F04 PIQ12F0
2
PIR1 F02
10uF, 10V, X5R, 20%
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
NLP500V0FEXP
P5.0V_FEXP 2N7002W UIM_PWR is open-drain pulldown FDDR3_VREF
PIC92F01 PIC93F01 PIC94F02 PIC67F01 PIC68F01 PIC69F01 PIR29F01COR29F
0.1uF, 25V, X5R
Si4435DY COU800D
U800D
PIC82F02 PIC83F01 COC92F
C92F COC93F
C93F COC94F
C94F COC67F
C67F COC68F
C68F COC69F
C69F R29F N4 NLSMB0SDA
SMB_SDA
IO_L1P_3 PIU8000N4
BANK 3
COC82F COC83F PIC92F02 PIC93F02 PIC94F01 PIC67F02 PIC68F02 PIC69F02
F_DX0
F_DX3
F_DX2
F_DX11
DDC_SDA
F_LVDS11_P
F_LVDS11_N
F_DX1
F_LVDSC_N
F_LVDSC_P
F_DX17
F_LVDSB_N
F_LVDSB_P
F_LVDS15_P
F_LVDS15_N
F_LVDS0_P
F_LVDS0_N
F_LVDS_CK1_P
F_LVDS_CK1_N
F_DX14
F_LVDS4_P
F_LVDS4_N
F_LVDS1_P
F_LVDS1_N
F_LVDS2_N
F_LVDS2_P
F_LVDSA_P
F_LVDSA_N
C82F C83F COU800B
U800B GND 1k, 1% (DNP) N3 NLSMB0SCL
SMB_SCL
NLF0DDR30RZQ IO_L1N_VREF_3 PIU8000N3
NLI2C30SCL
PIC82F01 PIC83F02 IO_L1P_A25_1
F15
PIU8000F15
F_DDR3_RZQ PIR29F02 IO_L2P_3
P4
PIU8000P4
I2C3_SCL
PIR28F02COR28F
BANK 1
F16 FDDR3_VREF P3 NLI2C30SDA
I2C3_SDA
IO_L1N_A24_VREF_1 PIU8000F16
R28F NLFDDR30VREF IO_L2N_3 PIU8000P3
NLF0DX16
C17 F_DDR3_A13 GND FDDR3_VREF L6 F_DX16
IO_L29P_A23_M1A13_1 PIU8000C17
100, 1% IO_L31P_3 PIU8000L6
GND GND
IO_L29N_A22_M1A14_1
C18
PIU8000C18
NLUIM0PWR
UIM_PWR
IO_L31N_VREF_3
M5
PIU8000M5
NLF0DX15
F_DX15
IO_L30P_A21_M1RESET_1
F14
PIU8000F14 F_DDR3_RST_N PIR28F01 COU12FA
U12FA COU12FB
U12FB
IO_L32P_M3DQ14_3
U2
PIU8000U2
NLUART40RTS
UART4_RTS
G14 F_DDR3_A11 NLF0DDR30A0
F_DDR3_A0 N3 E3 NLF0DDR30D0
F_DDR3_D0 M8 U1 NLUART40CTS
UART4_CTS
IO_L30N_A20_M1A11_1 PIU8000G14 FDDR_C i NLF0DDR30A1
PIU12F0N3 A0 DQ0 PIU12F0E3
NLF0DDR30D1 i FDDR_D PIU12F0M8 VREFCA IO_L32N_M3DQ15_3 PIU8000U1
NLF0DX14
D17 F_DDR3_CKE F_DDR3_A1 P7 F7 F_DDR3_D1 H1 T2 F_DX14
IO_L31P_A19_M1CKE_1 PIU8000D17 FDDR_C i NLF0DDR30A2
PIU12F0P7 A1 DQ1 PIU12F0F7
NLF0DDR30D2 i FDDR_D PIU12F0H1 VREFDQ IO_L33P_M3DQ12_3 PIU8000T2
NLUART40RXD
D18 F_DDR3_A12 GND F_DDR3_A2 P3 F2 F_DDR3_D2 P1.5V_DDR_SW3 T1 UART4_RXD
IO_L31N_A18_M1A12_1 PIU8000D18 FDDR_C i PIU12F0P3 A2 DQ2 PIU12F0F2 i FDDR_D IO_L33N_M3DQ13_3 PIU8000T1
H12 F_DDR3_A8
FDDR_C i
NLF0DDR30A3
F_DDR3_A3 N2 F8 NLF0DDR30D3
F_DDR3_D3
FDDR_D
A1 B1 P2 NLF0DX13
F_DX13
IO_L32P_A17_M1A8_1 PIU8000H12
NLF0DDR30A4
PIU12F0N2 A3 DQ3 PIU12F0F8
NLF0DDR30D4 i PIU12F0A1 VDDQ VSSQ PIU12F0B1 IO_L34P_M3UDQS_3 PIU8000P2
NLUART40TXD
G13 F_DDR3_A9 F_DDR3_A4 P8 H3 F_DDR3_D4 A8 B9 P1 UART4_TXD
IO_L32N_A16_M1A9_1 PIU8000G13 FDDR_C i NLF0DDR30A5 PIU12F0P8 A4 DQ4 PIU12F0H3
NLF0DDR30D5 i FDDR_D PIU12F0A8 VDDQ VSSQ PIU12F0B9 IO_L34N_M3UDQSN_3 PIU8000P1
NLBATT0REFLASH0ALRT
E16 F_DDR3_A10 F_DDR3_A5 P2 H8 F_DDR3_D5 C1 D1 N2 BATT_REFLASH_ALRT
IO_L33P_A15_M1A10_1 PIU8000E16 FDDR_C i NLF0DDR30A6 PIU12F0P2 A5 DQ5 PIU12F0H8
NLF0DDR30D6 i FDDR_D PIU12F0C1 VDDQ VSSQ PIU12F0D1 IO_L35P_M3DQ10_3 PIU8000N2
NLBATT0NRST
E18 F_DDR3_A4 F_DDR3_A6 R8 G2 F_DDR3_D6 C9 D8 N1 BATT_NRST
Apoptosis function IO_L33N_A14_M1A4_1 PIU8000E18 FDDR_C i NLF0DDR30A7
PIU12F0R8 A6 DQ6 PIU12F0G2
NLF0DDR30D7 i FDDR_D PIU12F0C9 VDDQ VSSQ PIU12F0D8 IO_L35N_M3DQ11_3 PIU8000N1
NLF0DX12
FPGA_RESET_N K12 F_WE_N F_DDR3_A7 R2 H7 F_DDR3_D7 D2 E2 M3 F_DX12
IO_L34P_A13_M1WE_1 PIU8000K12 FDDR_C i PIU12F0R2 A7 DQ7 PIU12F0H7 i FDDR_D PIU12F0D2 VDDQ VSSQ PIU12F0E2 IO_L36P_M3DQ8_3 PIU8000M3
APOPTOSIS TAMPER, !RESETBMCU SN74AUP1T97 is configured as NOR-gate, B-input inverted K13 F_BA2
FDDR_C i
NLF0DDR30A8
F_DDR3_A8 T8 D7 NLF0DDR30D8
F_DDR3_D8
FDDR_DH
E9 E8 M1 NLF0DX11
F_DX11
IO_L34N_A12_M1BA2_1 PIU8000K13 PIU12F0T8 A8 DQ8 PIU12F0D7 i PIU12F0E9 VDDQ VSSQ PIU12F0E8 IO_L36N_M3DQ9_3 PIU8000M1
When apoptosis is high, resetting the FPGA resets the CPU
IO_L35P_A11_M1A7_1
F17
PIU8000F17 F_DDR3_A7
FDDR_C i
NLF0DDR30A9
F_DDR3_A9 R3
PIU12F0R3 A9 DQ9
C3
PIU12F0C3 NLF0DDR30D9
F_DDR3_D9
i FDDR_DH
F1
PIU12F0F1 VDDQ F9
VSSQ PIU12F0F9 IO_L37P_M3DQ0_3
L2
PIU8000L2 NLF0LVDSC0P
F_LVDSC_P
C Apoptosis is normally pulled down, so if unconfigured, F18 F_DDR3_A2 F_DDR3_A10
NLF0DDR30A10 L7 C8 F_DDR3_D10
NLF0DDR30D10 H2 G1 L1 F_LVDSC_N
NLF0LVDSC0N C
NLFPGA0LED2 IO_L35N_A10_M1A2_1 PIU8000F18 FDDR_C i NLF0DDR30A11 PIU12F0L7 A10/AP DQ10 PIU12F0C8
NLF0DDR30D11 i FDDR_DH PIU12F0H2 VDDQ VSSQ PIU12F0G1 IO_L37N_M3DQ1_3 PIU8000L1
NLF0DX8
P3.3V_DELAYED apoptosis is effectively inactive FPGA_LED2 H13 F_BA0 F_DDR3_A11 R7 C2 F_DDR3_D11 H9 G9 K2 F_DX8
APT1608SGC green
IO_L36P_A9_M1BA0_1 PIU8000H13 FDDR_C i PIU12F0R7 A11 DQ11 PIU12F0C2 i FDDR_DH PIU12F0H9 VDDQ VSSQ PIU12F0G9 IO_L38P_M3DQ2_3 PIU8000K2
0.1uF, 6.3V, X5R
NLF0DDR30A12 NLF0DDR30D12 NLAPOPTOSIS
PID12F01 IO_L36N_A8_M1BA1_1
H14 F_BA1
FDDR_C i
F_DDR3_A12 N7
PIU12F0N7 A12/BC# DQ12
A7 F_DDR3_D12
i FDDR_DH
A9
VSS PIU12F0A9 IO_L38N_M3DQ3_3
K1 APOPTOSIS
1
PIU8000H14 PIU12F0A7 PIU8000K1
PIC6 F01 COC66F
P3.3V_DELAYED Setting apoptosis creates a one-way 'trap', such that
COD12F IO_L37P_A7_M1A0_1
H15
PIU8000H15
F_DDR3_A0
FDDR_C i
NLF0DDR30A13
F_DDR3_A13 T3
PIU12F0T3 A13 DQ13
A2
PIU12F0A2
NLF0DDR30D13
F_DDR3_D13
i FDDR_DH
B3
VSS PIU12F0B3 IO_L39P_M3LDQS_3
L4
PIU8000L4
NLF0DX7
F_DX7
COR24F
PIR24F01
C66F the FPGA can only be configured once after boot D12F
IO_L37N_A6_M1A1_1
H16
PIU8000H16
F_DDR3_A1 PIR31F02 DQ14
B8
PIU12F0B8
NLF0DDR30D14
F_DDR3_D14
i FDDR_DH
P1.5V_DDR_SW3 E1
VSS PIU12F0E1 IO_L39N_M3LDQSN_3
L3
PIU8000L3
NLF0DX6
F_DX6 R24F
PIC6 F02 COR31F
PID12F0 IO_L38P_A5_M1CLK_1
G16
PIU8000G16
F_DDR3_CK_P R31F
DQ15
A3
PIU12F0A3
F_DDR3_D15
NLF0DDR30D15
i FDDR_DH
B2
PIU12F0B2 VDD
G8
VSS PIU12F0G8 IO_L40P_M3DQ6_3
J3
PIU8000J3
F_DX5
NLF0DX5 10k, 1%
2
COU11F
U11F G18 F_DDR3_CK_N 100, 1% (DNP) D9 J2 J1 NLF0DX4
F_DX4 PIR24F02
IO_L38N_A4_M1CLKN_1 PIU8000G18
NLF0BA0 NLF0LDQS0P PIU12F0D9 VDD VSS PIU12F0J2 IO_L40N_M3DQ7_3 PIU8000J1
NLCLK20P
APOPTOSIS PIU11F01
1
B C PIU11F06
6 FPGA_RESET_N PIR27F02 IO_L39P_M1A3_1
J13
PIU8000J13
F_DDR3_A3 PIR31F01
FDDR_C
F_BA0
i NLF0BA1
M2
PIU12F0M2 BA0 LDQS PIU12F0F3
F3 F_LDQS_P G7
PIU12F0G7 VDD VSS
J8
PIU12F0J8 IO_L41P_GCLK27_M3DQ4_3
H2
PIU8000H2
CLK2_P
2 5 R27F
COR27F K14 F_DDR3_ODT F_BA1 N8 G3 NLF0LDQS0N
F_LDQS_N K2 M1 H1 NLCLK20N
CLK2_N
PIU11F02 GND Vcc PIU11F05
R26F
COR26F 330, 1% IO_L39N_M1ODT_1 PIU8000K14 FDDR_C i PIU12F0N8 BA1 LDQS# PIU12F0G3 PIU12F0K2 VDD VSS PIU12F0M1 IO_L41N_GCLK26_M3DQ5_3 PIU8000H1
PIU11F03
3
A Y PIU11F04
4 PIR26F01 PIR26F02
NLCPU0TAMPER
CPU_TAMPER RESETBMCU
IO_L40P_GCLK11_M1A5_1
L12
PIU8000L12
F_DDR3_A5
FDDR_C i
NLF0BA2
F_BA2 M3
PIU12F0M3 BA2
K8
PIU12F0K8 VDD
M9
VSS PIU12F0M9 IO_L42P_GCLK25_TRDY2_M3UDM_3
K4
PIU8000K4
NLF0LVDSA0P
F_LVDSA_P GND
PIR27F01
0 ohm (DNP) PIQ10F 3 IO_L40N_GCLK10_M1A6_1
L13
PIU8000L13
F_DDR3_A6 C7 F_UDQS_P
UDQS PIU12F0C7 NLF0UDQS0P
N1
PIU12F0N1 VDD
P1
VSS PIU12F0P1 IO_L42N_GCLK24_M3LDM_3
K3
PIU8000K3
F_LVDSA_N
NLF0LVDSA0N
3
74AUP1T97GW K15 F_RAS_N F_DDR3_CK_P
NLF0DDR30CK0P J7 B7 NLF0UDQS0N
F_UDQS_N N9 P9 L5 F_LVDSB_P
NLF0LVDSB0P
COQ10F
Q10F IO_L41P_GCLK9_IRDY1_M1RASN_1 PIU8000K15
NLF0DDR30CK0N PIU12F0J7 CK UDQS# PIU12F0B7 PIU12F0N9 VDD VSS PIU12F0P9 IO_L43P_GCLK23_M3RASN_3 PIU8000L5
NLF0LVDSB0N
1 K16 F_CAS_N F_DDR3_CK_N PIU12F0K7
K7 R1 T1 K5 F_LVDSB_N
PIQ10F01
2N7002W IO_L41N_GCLK8_M1CASN_1 PIU8000K16
NLF0DDR30CKE CK# NLF0LDM
PIU12F0R1 VDD VSS PIU12F0T1 IO_L43N_GCLK22_IRDY2_M3CASN_3 PIU8000K5
NLF0DX3
GND L15 F_UDM F_DDR3_CKE PIU12F0K9
K9 E7 F_LDM R9 T9 H4 F_DX3
IO_L42P_GCLK7_M1UDM_1 PIU8000L15 FDDR_C i CKE LDM PIU12F0E7 i FDDR_D PIU12F0R9 VDD VSS PIU12F0T9 IO_L44P_GCLK21_M3A5_3 PIU8000H4
PIQ10F 2 IO_L42N_GCLK6_TRDY1_M1LDM_1
L16 F_LDM PIR32F02COR32F UDM
D3 NLF0UDM
F_UDM
i FDDR_DH IO_L44N_GCLK20_M3A6_3
H3 NLF0DX2
F_DX2
2
PIU8000L16 PIU12F0D3 PIU8000H3
* WDOG_RST output from CPU is also provided H17 F_DDR3_D4 R32F MT41J128M16JT-125:K L7 NLF0DX1
F_DX1
IO_L43P_GCLK5_M1DQ4_1 PIU8000H17
4.7k, 1% IO_L45P_M3A3_3 PIU8000L7
GND May be necessary to tie that to apoptosis H18 F_DDR3_D5 F_WE_N
NLF0WE0N L3 K6 F_DX0
NLF0DX0
IO_L43N_GCLK4_M1DQ5_1 PIU8000H18 FDDR_C i NLF0CAS0N PIU12F0L3 WE# IO_L45N_M3ODT_3 PIU8000K6
NLUSB0HUB20RST
So a crash/watchdog reset forces apoptosis?
IO_L44P_A3_M1DQ6_1
J16
PIU8000J16
F_DDR3_D6 PIR32F01
FDDR_C i
F_CAS_N K3
PIU12F0K3 CAS# IO_L46P_M3CLK_3
G3
PIU8000G3
USB_HUB2_RST
GND J18 F_DDR3_D7 NLF0RAS0N
F_RAS_N J3 GND G1 NLF0DX17
F_DX17
IO_L44N_A2_M1DQ7_1 PIU8000J18 FDDR_C i PIU12F0J3 RAS# IO_L46N_M3CLKN_3 PIU8000G1
K17 F_LDQS_P L2 J7
IO_L45P_A1_M1LDQS_1 PIU8000K17 PIU12F0L2 CS# IO_L47P_M3A0_3 PIU8000J7
IO_L45N_A0_M1LDQSN_1
K18
PIU8000K18
F_LDQS_N
RESET# PIU12F0T2
T2 NLF0DDR30RST0N
F_DDR3_RST_N
i FDDR_C IO_L47N_M3A1_3
J6
PIU8000J6
NLDDC0SCL
DDC_SCL
IO_L46P_FCS_B_M1DQ2_1
L17
PIU8000L17
F_DDR3_D2 PIR3 F02 IO_L48P_M3BA0_3
F2
PIU8000F2
DDC_SDA
NLDDC0SDA
L18 F_DDR3_D3 GND F_DDR3_ODT
NLF0DDR30ODT K1 L8 NLF0DDR30ZQ
F_DDR3_ZQ COR33F
R33F F1 RESETBMCU
NLRESETBMCU
IO_L46N_FOE_B_M1DQ3_1 PIU8000L18 FDDR_C i PIU12F0K1 ODT ZQ PIU12F0L8 IO_L48N_M3BA1_3 PIU8000F1
NLAUD0MCLK
IO_L47P_FWE_B_M1DQ0_1
M16
PIU8000M16
F_DDR3_D0 PIR34F02 4.7k, 1%
IO_L49P_M3A7_3
H6
PIU8000H6
AUD_MCLK
IO_L47N_LDC_M1DQ1_1
M18
PIU8000M18
F_DDR3_D1 MT41J128M16JT-125:K R34F
COR34F PIR3 F01 IO_L49N_M3A2_3
H5
PIU8000H5
N17 F_DDR3_D8 240, 1% E3 NLFPGA0LSPI0HOLD
FPGA_LSPI_HOLD
IO_L48P_HDC_M1DQ8_1 PIU8000N17 IO_L50P_M3WE_3 PIU8000E3
IO_L48N_M1DQ9_1
N18
PIU8000N18
F_DDR3_D9 PIR34F01 IO_L50N_M3BA2_3
E1
PIU8000E1
P17 F_DDR3_D10 GND F4
IO_L49P_M1DQ10_1 PIU8000P17 IO_L51P_M3A10_3 PIU8000F4
P18 F_DDR3_D11 F3
IO_L49N_M1DQ11_1 PIU8000P18 IO_L51N_M3A4_3 PIU8000F3
1.0uF, 25V, 20% X5R
10uF, 10V, X5R, 20%
N15 F_UDQS_P GND D2 NLFPGA0LSPI0MISO
FPGA_LSPI_MISO
IO_L50P_M1UDQS_1 PIU8000N15 IO_L52P_M3A8_3 PIU8000D2
IO_L50N_M1UDQSN_1
N16
PIU8000N16
F_UDQS_N
IO_L52N_M3A9_3
D1
PIU8000D1
NLFPGA0LSPI0CS
FPGA_LSPI_CS
T17 F_DDR3_D12 P1.5V_DDR_SW3 H7 F_DX18
NLF0DX18
IO_L51P_M1DQ12_1 PIU8000T17 IO_L53P_M3CKE_3 PIU8000H7
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
T18 F_DDR3_D13 G6
IO_L51N_M1DQ13_1 PIU8000T18 IO_L53N_M3A12_3 PIU8000G6
IO_L52P_M1DQ14_1
U17
PIU8000U17
F_DDR3_D14 PIC70F 2 PIC71F01 PIC72F01 PIC73F01 PIC74F01 PIC76F01 PIC7 F01 PIC78F01 PIC79F01 PIC80F01 PIC81F01 IO_L54P_M3RESET_3
E4
PIU8000E4
U18 F_DDR3_D15 C70F
COC70F C71F
COC71F C72F
COC72F C73F
COC73F C74F
COC74F C76F
COC76F C77F
COC77F C78F
COC78F C79F
COC79F C80F
COC80F C81F
COC81F D3 NLFPGA0LSPI0CLK
FPGA_LSPI_CLK
IO_L52N_M1DQ15_1 PIU8000U18 IO_L54N_M3A11_3 PIU8000D3
IO_L53P_1
M14
PIU8000M14
NLF0DDR30ZIO
F_DDR3_ZIO PIC70F 1 PIC71F02 PIC72F02 PIC73F02 PIC74F02 PIC76F02 PIC7 F02 PIC78F02 PIC79F02 PIC80F02 PIC81F02 IO_L55P_M3A13_3
F6
PIU8000F6
N14 FDDR3_VREF F5
IO_L53N_VREF_1 PIU8000N14 IO_L55N_M3A14_3 PIU8000F5
D L14 C2 FPGA_LSPI_MOSI
NLFPGA0LSPI0MOSI D
IO_L61P_1 PIU8000L14 IO_L83P_3 PIU8000C2
M13 GND C1 FPGA_LSPI_WP
NLFPGA0LSPI0WP
IO_L61N_1 PIU8000M13 IO_L83N_VREF_3 PIU8000C1
P15
IO_L74P_AWAKE_1 PIU8000P15
P16 P1.5V_DDR_SW3 XC6SLX45-3CSG324C
IO_L74N_DOUT_BUSY_1 PIU8000P16
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
XC6SLX45-3CSG324C PIC84F01 PIC85F01 PIC86F01 PIC87F01 PIC8 F01 PIC89F01 PIC90F 1 PIC91F01
COC84F
C84F COC85F
C85F COC86F
C86F COC87F
C87F COC88F
C88F COC89F
C89F COC90F
C90F COC91F
C91F
PIC84F02 PIC85F02 PIC86F02 PIC87F02 PIC8 F02 PIC89F02 PIC90F 2 PIC91F02 Copyright 2014 Andrew "bunnie" Huang
Title
GND Novena PVT2-A
Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 C
Date: 7/5/2014 Sheet of
File: F:\largework\..\15fpga.SchDoc Drawn By:
1 2 3 4 5 6
1 2 3 4 5 6
Intended for internal module expansion Optional resistive touchscreen P3.3V_DELAYED
Intended for external access
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
Note: STMPE811 is mandatory for microphone jack play/pause button detection
PIC18D01 PIC19D01
P3.3V_DELAYED COC18D
C18D COC19D
C19D
PIC18D02 PIC19D02
Console/debug UART
FTDI TTL-232R-3V3 cable pinout
P3.3V_DELAYED
PID10 1 COD10D
P3.3V_DELAYED
COR13D
R13D
P3.3V_DELAYED
A Put in a convenient location
PID1 01 COD11D PID10 2
D10D
CDBM140-G
PIR13D02
10k, 1%
NLTS0TOUCHED
PIR13D01TS_TOUCHED GND A
COP10D
P10D D11D
COR15D PIP10D01
1 PID1 02 CDBM140-G PIR19D01 COU11D
U11D
UART2_RXD R15D Header with RTS/CTS COR19D
R19D NLLCD0YM
LCD_YM 1 16 NLLCD0XM
LCD_XM
PIR15D02 PIR15D01 PIP10D02 PIU11D01 PIU11D016
2 10k, 1% Y- X- NLLCD0YP
100, 1% Serial + high resolution timer input Useful for modems, BT; shared with battery 2 15 LCD_YP
PIP10D03 3 PIR19D02 PIU11D02 INT Y+ PIU11D015
Useful for high precision GPS Address 0x88 3 14
COR16D
R16D PIP10D04 4 NLSMB0SCL PIU11D03 DOUT/A0 VIO PIU11D014
NLLCD0XP
UART2_TXD SMB_SCL 4 13 LCD_XP
PIR16D02 PIR16D01 PIP10D05 5 COP11D NLSMB0SDA PIU11D04 SCLK X+ PIU11D013
NLTS0ANA
100, 1% P11D SMB_SDA 5 12 TS_ANA
PIP10D06 6 COP12D PIU11D05 SDAT GPIO3 PIU11D012
NLMIC0ISO COR20D
R20D NLMIC0CABLE
P12D 6 11 MIC_ISO PIR20D02 MIC_CABLE
NLUART40CTS PIP11D01 1 PIU11D06 VCC GPIO2 PIU11D011 PIR20D01
0.1uF, 6.3V, X5R
0.1uF, 6.3V, X5R
Male 2.54mm 6x1 header UART4_CTS 7 10 100k, 1%
NLGPT0CLKIN
PIP12D01 1 PIP11D02 2 PIU11D07 DIN GND PIU11D010
GPT_CLKIN PIP12D02 2
PIC10D01 PIP11D03 3
PIC1 D01 MODE
9
PIU11D09
COC10D
C10D NLUART40RXD
UART4_RXD COC11D
C11D 17 Configure GPIO2 as ADC input
PIP12D03 3 PIP11D04 4 PIU11D017 GNDPAD
PID12 01 PID13 01 PIC10D02 NLUART40TXD PIC1 D02
ESD5Z3.3T1
ESD5Z3.3T1
UART3_RXD PIP12D04 UART4_TXD PIP11D05 To detect play/pause/etc buttons
4 5
1
1
GND NLUART30TXD
UART3_TXD PIP12D05
NLUART40RTS
UART4_RTS PIP11D06 STMPE811QTR on headset cable
COD12D
D12D COD13D
D13D NLGPT0CAPIN1 5 6
GPT_CAPIN1 PIP12D06
6
Male 2.54mm 6x1 header
Male 2.54mm 6x1 header
PID12 0 PID13 02 GND GND GND
2
2
GND GND
B GND B
pull-ups on UART inputs to prevent spurious console events
P3.3V_DELAYED
PIR10D01 PIR1 D01 PIR12D01 PIR14D01
COR10D
R10D COR11D
R11D COR12D
R12D COR14D
R14D
10k, 1% 10k, 1% 10k, 1% 10k, 1%
PIR10D02 PIR1 D02 PIR12D02 PIR14D02
UART2_RXD
UART3_RXD
UART2_TXD
UART4_RTS
Front panel breakout header
COP16D
P16D
NLUART20XD NLUART20XD NLUART30XD
NLP500V0MOUSE
P5.0V_MOUSE
NLUSB0MOUSE0N PIP16D030 30 COJ10D accelerometer
USB_MOUSE_N J10D
NLUSB0MOUSE0P PIP16D029 29
USB_MOUSE_P PIP16D028 28 PIJ10D01 1
bare wire hole
PIP16D027 27
Device addr = 0x38
NLP500V0KBD
P5.0V_KBD PIP16D026 26
test point (DNP)
C NLUSB0KBD0N
USB_KBD_N COJ11D
J11D have fun. C
PIP16D025 25
10uF, 10V, X5R, 20%
NLUSB0KBD0P
USB_KBD_P PIP16D024 24 PIJ11D01 1
P3.3V_DELAYED
NLFPGA0LSPI0CLK
PIP16D023 23 COU10D
FPGA_LSPI_CLK PIP16D022 test point (DNP) P3.3V_DELAYED U10D
22
10uF, 10V, X5R, 20%
0.1uF, 6.3V, X5R
NLFPGA0LSPI0WP
FPGA_LSPI_WP COJ12D
J12D 1 14
PIP16D021 21 PIU10D01 VDDIO VDD PIU10D014
NLFPGA0LSPI0MISO
FPGA_LSPI_MISO PIP16D020 20 PIJ12D01 1
PIC16D01 PIC17D01 2
PIU10D02 BYP
COC16D
C16D COC17D
C17D
PIP16D019 19
10uF, 10V, X5R, 20%
NLFPGA0LSPI0MOSI
FPGA_LSPI_MOSI PIP16D018
18
test point (DNP) PIC16D02 PIC17D02 SMB_SCL 4
PIU10D04 SCL GND
12
PIU10D012
NLFPGA0LSPI0HOLD
FPGA_LSPI_HOLD PIP16D017
17
COJ13D
J13D 5
PIU10D05 GND INT1
11
PIU10D011
NLACCEL0INT
ACCEL_INT PIC14D01
P5.0V_DELAYED NLFPGA0LSPI0CS
FPGA_LSPI_CS P3.3V_DELAYED P5.0V_DELAYED SMB_SDA 6 10 COC14D
C14D
SMT pad
PIP16D016 16 PIJ13D01 1 PIU10D06 SDA GND PIU10D010
PIC14D02
0.1uF, 6.3V, X5R
0.1uF, 25V, X5R
GND 7 9
PIP16D015 15 PIU10D07 SA0 INT2 PIU10D09
0.1uF, 6.3V, X5R
PIP16D014 14 PIC64F01 PIC29U01 PIC30U01 test point (DNP)
short to ground to toggle power CHG_PWRSWITCH
NLCHG0PWRSWITCH COC64F
C64F COC29U
C29U COC30U
C30U J14D
COJ14D PIC15D01 MMA8452QR1
PIP16D013 13 COC15D
GPT_CAPIN1 PIP16D012 12 PIC64F02 PIC29U02 PIC30U02 PIJ14D01 1
C15D
control 5V power on breakout NLGPT0CMPOUT3
GPT_CMPOUT3 PIP16D011 11
PIC15D02
case open status NLKEY0COL3
KEY_COL3 test point (DNP)
PIP16D010 10
BT association button NLKEY0ROW1
KEY_ROW1 GND COJ15D
J15D
NLEPIT10EPITO PIP16D09 9
EPIT1_EPITO das blinkenlight P3.3V_DELAYED EPIT1_EPITO GND GND
PIP16D08 8 PIJ15D01 1
LTST-S270KGKT green
PIP16D07 7
TS_ANA test point (DNP)
Activity LED / CPU alive
PIP16D06 6
PID1401 5
1
PIP16D05
NLSPK0L0P
SPK_L_P PIP16D04 4
COD14D
D14D SPK_L_N
NLSPK0L0N GND
PIP16D03 3
PID14 02 SPK_R_P
NLSPK0R0P PIP16D02 2
2
D SPK_R_N
NLSPK0R0N D
PIP16D01 1 Copyright 2014 Andrew "bunnie" Huang
PIR18D02 HRS FH34SRJ-30S-0.5SH(99) Title
R18D
COR18D
330, 1% Novena PVT2-A
PIR18D01 GND Size Number Revision
Copyrights: CC-BY-SA 3.0 Patents: Apache 2.0 B
GND Date: 7/5/2014 Sheet of
File: F:\largework\..\16gpio_misc.SchDoc Drawn By:
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