| MAKE(1) | General Commands Manual | MAKE(1) |
make — maintain
program dependencies
make |
[-ABPSXeiknpqrstv] [-C
directory] [-D
variable] [-d
flags] [-E
variable] [-f
makefile] [-I
directory]
[-j max_jobs]
[-m directory]
[-V variable]
[-x warning_options]
[variable=value]
[target ...] |
The make utility is a program designed to
simplify the maintenance of other programs. Its input is a list of
specifications describing dependency relationships between the generation of
files and programs.
First of all, the initial list of specifications will be read from
the system makefile, sys.mk, unless inhibited with
the -r option. The standard
sys.mk as shipped with
FreeBSD also handles make.conf(5),
the default path to which can be altered via the
make variable __MAKE_CONF.
Then the first of BSDmakefile,
makefile, and Makefile that
can be found in the current directory, object directory (see
.OBJDIR), or search path (see the
-I option) will be read for the main list of
dependency specifications. A different makefile or list of them can be
supplied via the -f option(s). Finally, if the file
.depend can be found in any of the aforesaid
locations, it will also be read (see mkdep(1)).
When make searches for a makefile, its
name takes precedence over its location. For instance,
BSDmakefile in the object directory will be favored
over Makefile in the current directory.
The options are as follows:
-Amake to
just skip the remainder or all of the archive and continue after printing
a message.-B-j
is used.-C
directory-C options are
specified, each is interpreted relative to the previous one:
-C /
-C etc is equivalent to
-C /etc.-D
variable-d
flagsmake are to print debugging information. Argument
flags is one or more of the following:
-E
variable-e-f
makefilemake will search for it as described above. In
case makefile is
‘-’, standard input is read.
Multiple -f options can be supplied, and the
makefiles will be read in that order. Unlike the other command-line
options, -f is neither stored in
.MAKEFLAGS nor pushed down to sub-makes via
MAKEFLAGS. See below for more details on these
variables.-I
directory-I options can be specified to
form a search path. The system makefile directory (or directories, see the
-m option) is automatically appended at the tail
of this path.-i-’ before each command
line in the makefile.-j
max_jobsmake may
have running at any one time. Turns compatibility mode off, unless the
-B flag is also specified.-k-m
directory-m options can be specified to form a search path.
This path will override the default system include path,
/usr/share/mk-freebsd. The system include path
will always be appended to the search path used for "..."-style
inclusions and makefile searches (see the -I
option).
If a file or directory name in the -m
argument (or the MAKESYSPATH environment
variable) starts with the string ".../" then
make will search for the specified file or
directory named in the remaining part of the argument string. The search
starts with the current directory of the Makefile and then works upward
towards the root of the filesystem. If the search is successful, then
the resulting directory replaces the ".../" specification in
the -m argument. If used, this feature allows
make to easily search in the current source tree
for customized sys.mk files (e.g. by using ".../mk/sys.mk" as
an argument). Note that a -C that are earlier on
the command line affect where -m
".../" searches.
-n-P-j is used too.-p-d g1. When combined
with -f /dev/null, only
the builtin rules of make are displayed.-Q-q-r-S-k option during recursive
builds.-s@’ before each command line in the
makefile.-t-V
variablemake's idea of the value of
variable, in the global context. Do not build any
targets. Multiple instances of this option may be specified; the variables
will be printed one per line, with a blank line for each null or undefined
variable. If variable contains a
‘$’ then the value will be expanded
before printing.-v-X-V option to print the values of
variables, do not recursively expand the values.-x
warning_optionsno” in which case the warning is
switched off. The currently available options are:
dirsyntax.endif or .else
directive.See also the .WARN special target.
There are seven different types of lines in a makefile: file dependency specifications, shell commands, variable assignments, include statements, conditional directives, for loops, and comments.
In general, lines may be continued from one line to the next by
ending them with a backslash (‘\’).
The trailing newline character and initial whitespace on the following line
are compressed into a single space.
Dependency lines consist of one or more targets, an operator, and zero or more sources. This creates a relationship where the targets “depend” on the sources and are usually created from them. The exact relationship between the target and the source is determined by the operator that separates them. The three operators are as follows:
:make is interrupted.!make is interrupted.::make is interrupted.Targets and sources may contain the shell wildcard expressions
‘?’,
‘*’,
‘[]’ and
‘{}’. The expressions
‘?’,
‘*’ and
‘[]’ may only be used as part of the
final component of the target or source, and must be used to describe
existing files. The expression ‘{}’
need not necessarily be used to describe existing files. Expansion is in
directory order, not alphabetically as done in the shell.
Each target may have associated with it a series of shell
commands, normally used to create the target. Each of the commands in this
script
must be
preceded by a tab. While any target may appear on a dependency line, only
one of these dependencies may be followed by a creation script, unless the
‘::’ operator is used.
If the first characters of the command line are
‘@’,
‘-’, and/or
‘+’, the command is treated specially.
A ‘@’ causes the command not to be
echoed before it is executed. A ‘-’
causes any non-zero exit status of the command line to be ignored. A
‘+’ causes the command to be executed
even if -n is specified on the command line.
Variables in make are much like variables
in the shell, and, by tradition, consist of all upper-case letters. The five
operators that can be used to assign values to variables are as follows:
=+=?=:=!=Any whitespace before the assigned value is removed; if the value is being appended, a single space is inserted between the previous contents of the variable and the appended value.
Variables are expanded by surrounding the variable name with
either curly braces (‘{}’) or
parentheses (‘()’) and preceding it
with a dollar sign (‘$’). If the
variable name contains only a single letter, the surrounding braces or
parentheses are not required. This shorter form is not recommended.
Variable substitution occurs at two distinct times, depending on where the variable is being used. Variables in dependency lines are expanded as the line is read. Variables in shell commands are expanded when the shell command is executed.
The four different classes of variables (in order of increasing precedence) are:
make's
environment.MAKEFLAGS environment variable or the
.MAKEFLAGS target.If the name of an environment variable appears in a makefile on
the left-hand side of an assignment, a global variable with the same name is
created, and the latter shadows the former as per their relative
precedences. The environment is not changed in this case, and the change is
not exported to programs executed by make. However,
a command-line variable actually replaces the environment variable of the
same name if the latter exists, which is visible to child programs.
There are seven local variables in
make:
The shorter forms ‘@’, ‘!’, ‘<’, ‘%’, ‘?’, ‘>’, and ‘*’ are permitted for backward compatibility and are not recommended. The six variables ‘@F’, ‘@D’, ‘<F’, ‘<D’, ‘*F’, and ‘*D’ are permitted for compatibility with AT&T System V UNIX makefiles and are not recommended.
Four of the local variables may be used in sources on dependency lines because they expand to the proper value for each target on the line. These variables are .TARGET, .PREFIX, .ARCHIVE, and .MEMBER.
In addition, make sets or knows about the
following internal variables or environment variables:
$’, i.e.
‘$$’ expands to a single dollar
sign.make was executed with
(argv[0]).make was executed.
The make utility sets
.CURDIR to the canonical path given by
getcwd(3).make searches for an alternate directory to place
target files. It will attempt to change into this special directory and
will search this directory for makefiles not found in the current
directory. The following directories are tried in order:
The first directory that make
successfully changes into is used. If either
MAKEOBJDIRPREFIX or
MAKEOBJDIR is set in the environment but
make is unable to change into the corresponding
directory, then the current directory is used without checking the
remainder of the list. If they are undefined and
make is unable to change into any of the
remaining three directories, then the current directory is used. Note,
that MAKEOBJDIRPREFIX and
MAKEOBJDIR must be environment variables and
should not be set on make's command line.
The make utility sets
.OBJDIR to the canonical path given by
getcwd(3).
make reads various makefiles, including the
default files and any obtained from the command line and
.include and .sinclude
directives, their names will be automatically appended to the
.MAKEFILE_LIST variable. They are added right before
make begins to parse them, so that the name of the
current makefile is the last word in this variable.MAKEFLAGSMAKEFLAGS may initially
contain anything that may be specified on make's
command line, including -f option(s). After
processing, its contents are stored in the
.MAKEFLAGS global variable, although any
-f options are omitted. Then all options and
variable assignments specified on make's command
line, except for -f, are appended to the
.MAKEFLAGS variable.
Whenever make executes a program, it
sets MAKEFLAGS in the program's environment to
the current value of the .MAKEFLAGS global
variable. Thus, if MAKEFLAGS in
make's environment contains any
-f options, they will not be pushed down to
child programs automatically. The make utility
effectively filters out -f options from the
environment and command line although it passes the rest of its options
down to sub-makes via MAKEFLAGS by default.
When passing macro definitions and flag arguments in the
MAKEFLAGS environment variable, space and tab
characters are quoted by preceding them with a backslash. When reading
the MAKEFLAGS variable from the environment, all
sequences of a backslash and one of space or tab are replaced just with
their second character without causing a word break. Any other
occurrences of a backslash are retained. Groups of unquoted space, tab
and newline characters cause word breaking.
make's
current run-time options from the environment and command line as
described above, under MAKEFLAGS. By modifying the
contents of the .MAKEFLAGS global variable, the
makefile can alter the contents of the MAKEFLAGS
environment variable made available for all programs which
make executes. This includes adding
-f option(s). The current value of
.MAKEFLAGS is just copied verbatim to
MAKEFLAGS in the environment of child programs.
Note that any options entered to
.MAKEFLAGS neither affect the current instance of
make nor show up in its own copy of
MAKEFLAGS instantly. However, they do show up in
the MAKEFLAGS environment variable of programs
executed by make. On the other hand, a direct
assignment to MAKEFLAGS neither affects the
current instance of make nor is passed down to
make's children. Compare with the
.MAKEFLAGS special target below.
MAKEFLAGS environment variable
plus any options specified on make's command
line.make.make.make is run with -j
-v then output for each target is prefixed with a
token ‘--- target ---’ the first
part of which can be controlled via
.MAKE.JOB.PREFIX.
.MAKE.JOB.PREFIX=${.newline}---${MAKE:T}[${.MAKE.PID}]
would produce tokens like ‘---make[1234] target
---’ or
.MAKE.JOB.PREFIX=---pid[${.MAKE.PID}],ppid[${.MAKE.PPID}]
would produce tokens like
‘---pid[56789],ppid[1234] target
---’ making it easier to track the degree of parallelism
being achieved.make is currently building..INCLUDES special target..LIBS special target.make is running
on, obtained from the MACHINE environment
variable, or through uname(3) if not defined.make was compiled
for, defined at compilation time.make after it has finished parsing all
input makefiles.Variable expansion may be modified to select or modify each word of the variable (where a “word” is whitespace-delimited sequence of characters). The general format of a variable expansion is as follows:
{variable[:modifier[:...]]}Each modifier begins with a colon and one of the following special
characters. The colon may be escaped with a backslash
(‘\’).
:C/pattern/replacement/[1g]1’ modifier causes the substitution
to apply to at most one word; the
‘g’ modifier causes the substitution
to apply to as many instances of the search pattern as occur in the word
or words it is found in. Note that
‘1’ and
‘g’ are orthogonal; the former
specifies whether multiple words are potentially affected, the latter
whether multiple substitutions can potentially occur within each affected
word.:E:H:L:Mpattern*’,
‘?’, and
‘[]’) may be used. The wildcard
characters may be escaped with a backslash
(‘\’).:Npattern:M, but selects all words
which do not match the rest of the modifier.:O:Qmake.:R:S/old_string/new_string/[g]g’ is appended to the last slash of
the pattern, all occurrences in each word are replaced. If
old_string begins with a caret
(‘^’),
old_string is anchored at the beginning of each
word. If old_string ends with a dollar sign
(‘$’), it is anchored at the end of
each word. Inside new_string, an ampersand
(‘&’) is replaced by
old_string. Any character may be used as a delimiter
for the parts of the modifier string. The anchoring, ampersand, and
delimiter characters may be escaped with a backslash
(‘\’).
Variable expansion occurs in the normal fashion inside both
old_string and new_string
with the single exception that a backslash is used to prevent the
expansion of a dollar sign (‘$’),
not a preceding dollar sign as is usual.
:T:tl:tu:U:uDirectives, conditionals, and for loops reminiscent of the C
programming language are provided in make. All such
structures are identified by a line beginning with a single dot
(‘.’) character. The following
directives are supported:
.include
<file>.include
"file"-I option
are searched before the system makefile directory..sinclude
<file>.sinclude
"file".include, but silently ignored if the file
cannot be found and opened..undef
variable.error
messagemake terminates with exit code 1. Variables in the
message are expanded..warning
messageConditionals are used to determine which parts of the Makefile to process. They are used similarly to the conditionals supported by the C pre-processor. The following conditionals are supported:
.if
[!]expression [operator expression
...].ifdef
[!]variable [operator variable
...].ifndef
[!]variable [operator variable
...].ifmake
[!]target [operator target
...].ifnmake
[!]target [operator target
...].else.elif
[!]expression [operator expression
...].else followed by
.if..elifdef
[!]variable [operator variable
...].else followed by
.ifdef..elifndef
[!]variable [operator variable
...].else followed by
.ifndef..elifmake
[!]target [operator target
...].else followed by
.ifmake..elifnmake
[!]target [operator target
...].else followed by
.ifnmake..endifThe operator may be any one of the following:
As in C, make will only evaluate a
conditional as far as is necessary to determine its value. Parentheses may
be used to change the order of evaluation. The boolean operator
‘!’ may be used to logically negate an
entire conditional. It is of higher precedence than
‘&&’.
The value of expression may be any of the following:
definedmakemake's command line or was
declared the default target (either implicitly or explicitly, see
.MAIN) before the line containing the
conditional.emptyexiststargetAn expression may also be a numeric or string comparison: in this case, the left-hand side must be a variable expansion, whereas the right-hand side can be a constant or a variable expansion. Variable expansion is performed on both sides, after which the resulting values are compared. A value is interpreted as hexadecimal if it is preceded by 0x, otherwise it is decimal; octal numbers are not supported.
String comparison can only use the
‘==’ or
‘!=’ operators, whereas numeric values
(both integer and floating point) can also be compared using the
‘>’,
‘>=’,
‘<’ and
‘<=’ operators.
If no relational operator (and right-hand value) are given, an
implicit ‘!= 0’ is used. However be
very careful in using this feature especially when the left-hand side
variable expansion returns a string.
When make is evaluating one of these
conditional expressions, and it encounters a word it does not recognize,
either the “make” or “defined” expression is
applied to it, depending on the form of the conditional. If the form is
.if, .ifdef or
.ifndef, the “defined” expression is
applied. Similarly, if the form is .ifmake or
.ifnmake, the “make” expression is
applied.
If the conditional evaluates to true the parsing of the makefile
continues as before. If it evaluates to false, the following lines are
skipped. In both cases this continues until a .else
or .endif is found.
For loops are typically used to apply a set of rules to a list of files. The syntax of a for loop is:
After the for expression is evaluated, it is
split into words. The iteration variable is
successively set to each word, and substituted in the
make-rules inside the body of the for loop.
Comments begin with a hash
(‘#’) character, anywhere but in a
shell command line, and continue to the end of the line.
.IGNORE-’)..MAKE-n or -t options were
specified. Normally used to mark recursive
make's..NOTMAINmake selects the first target it
encounters as the default target to be built if no target was specified.
This source prevents this target from being selected..OPTIONALmake
cannot figure out how to create it, it will ignore this fact and assume
the file is not needed or already exists..PRECIOUSmake is interrupted, it removes any partially
made targets. This source prevents the target from being removed..SILENT@’)..USEmake's version of a macro.
When the target is used as a source for another target, the other target
acquires the commands, sources, and attributes (except for
.USE) of the source. If the target already has
commands, the .USE target's commands are appended
to them..WAIT.WAIT source appears in a dependency
line, the sources that precede it are made before the sources that succeed
it in the line. Loops are not being detected and targets that form loops
will be silently ignored.Special targets may not be included with other targets, i.e., they must be the only target specified.
.BEGIN.DEFAULT.USE rule for any target (that
was used only as a source) that make cannot figure
out any other way to create. Only the shell script is used. The
.IMPSRC variable of a target that inherits
.DEFAULT's commands is set to the target's own
name..END.IGNORE.IGNORE
attribute. If no sources are specified, this is the equivalent of
specifying the -i option..INCLUDES.SUFFIXES; any suffix so declared will have the
directories on its search path (see .PATH) placed
in the .INCLUDES special variable, each preceded by
a -I flag..INTERRUPTmake is interrupted, the commands for this
target will be executed..LIBS.INCLUDES does for
include files, except that the flag used is
-L..MAINmake is invoked,
this target will be built. This is always set, either explicitly, or
implicitly when make selects the default target,
to give the user a way to refer to the default target on the command
line..MAKEFILEDEPS.MAKEFLAGSmake when the makefile is used. The flags are as
if typed to the shell, though the -f option will
have no effect. Flags (except for -f) and variable
assignments specified as the source for this target are also appended to
the .MAKEFLAGS internal variable. Please note the
difference between this target and the .MAKEFLAGS
internal variable: specifying an option or variable assignment as the
source for this target will affect
both the
current makefile and all processes that make
executes..MFLAGS.NOTPARALLEL.NO_PARALLELpmake
variants..ORDER.PATH.PATH is preferred over use of the
VPATH variable..PATHsuffixmake
utility first searches the suffixed search path, before reverting to the
default path if the file is not found there. This form is required for
.LIBS and .INCLUDES to
work..PHONY.PHONY attribute to any specified
sources. Targets with this attribute are always considered to be out of
date..POSIXmake's behavior to match the applicable
POSIX specifications. (Note this disables the “Remaking
Makefiles” feature.).PRECIOUS.PRECIOUS attribute to any specified
sources. If no sources are specified, the
.PRECIOUS attribute is applied to every target in
the file..SHELL%s’.%s’.ENV environment variable
before executing any command. This is useful for the Korn-shell
(ksh).Values that are strings must be surrounded by double quotes.
Boolean values are specified as
‘T’ or
‘Y’ (in either case) to mean true.
Any other value is taken to mean false.
There are several uses of the .SHELL
target:
.SHELL: path="/usr/local/bin/sh"
selects the builtin shell
“sh” but will execute it from
/usr/local/bin/sh. Like in the previous
case, it is possible to modify parameters of the builtin shell by
just specifying them.
The builtin shells are
“sh”,
“csh” and
“ksh”. Because
FreeBSD has no ksh in
/bin, it is unwise to specify
name="ksh"
without also specifying a path.
.SILENT.SILENT attribute to any specified
sources. If no sources are specified, the .SILENT
attribute is applied to every command in the file..SUFFIXESmake. If no
sources are specified, any previous specified suffixes are deleted..WARN-x command line option. Warning flags specified on
the command line take precedence over flags specified in the makefile.
Also, command line warning flags are pushed to sub-makes through the
MAKEFLAGS environment variables so that a warning
flag specified on the command line will influence all sub-makes. Several
flags can be specified on a single .WARN target by
separating them with blanks.If the special target .MAKEFILEDEPS exists
in the Makefile, make enables the “Remaking
Makefiles” feature. After reading Makefile and all the files that are
included using .include or
.sinclude directives (source Makefiles)
make considers each source Makefile as a target and
tries to rebuild it. Both explicit and implicit rules are checked and all
source Makefiles are updated if necessary. If any of the source Makefiles
were rebuilt, make restarts from clean state.
To prevent infinite loops the following source Makefile targets are ignored:
::
targets that have no prerequisites!
targets.PHONY or
.EXEC attributesWhen remaking a source Makefile options -t
(touch target), -q (query mode), and
-n (no exec) do not take effect, unless source
Makefile is specified explicitly as a target in make
command line.
Additionally, system makefiles and .depend
are not considered as Makefiles that can be rebuilt.
The make utility uses the following
environment variables, if they exist: MACHINE,
MAKE, MAKEFLAGS,
MAKEOBJDIR,
MAKEOBJDIRPREFIX, and
MAKESYSPATH.
MAKEOBJDIRPREFIX directory.List all included makefiles in order visited:
make -V .MAKEFILE_LIST | tr \
\\nOlder versions of make used
MAKE instead of MAKEFLAGS.
This was removed for POSIX compatibility. The internal variable
MAKE is set to the same value as
.MAKE; support for this may be removed in the
future.
The use of the :L and
:U modifiers are deprecated in
FreeBSD 10.0 and the more portable (among Pmake
decedents) :tl and :tu
should be used instead.
Most of the more esoteric features of make
should probably be avoided for greater compatibility.
PMake - A Tutorial. in /usr/share/doc/psd/12.make
A make command appeared in PWB UNIX.
The determination of .OBJDIR is contorted to the point of absurdity.
In the presence of several .MAIN special
targets, make silently ignores all but the
first.
.TARGETS is not set to the default target
when make is invoked without a target name and no
.MAIN special target exists.
The evaluation of expression in a test is
very simple-minded. Currently, the only form that works is
‘.if ${VAR} op something’. For
instance, you should write tests as ‘.if ${VAR} ==
string’ not the other way around, which would give you an
error.
For loops are expanded before tests, so a fragment such as:
.for ARCH in ${SHARED_ARCHS}
.if ${ARCH} == ${MACHINE}
...
.endif
.endfor
will not work, and should be rewritten as:
.for ARCH in ${SHARED_ARCHS}
.if ${MACHINE} == ${ARCH}
...
.endif
.endfor
The parsing code is broken with respect to handling a semicolon after a colon, so a fragment like this will fail:
HDRS= foo.h bar.h
all:
.for h in ${HDRS:S;^;${.CURDIR}/;}
...
.endfor
A trailing backslash in a variable value defined on the command
line causes the delimiting space in the MAKEFLAGS
environment variable to be preceded by that backslash. That causes a submake
to not treat that space as a word delimiter. Fixing this requires a larger
rewrite of the code handling command line macros and assignments to
.MAKEFLAGS.
| May 30, 2012 | Debian |