VR(4) | Device Drivers Manual | VR(4) |
vr
— VIA
Technologies Rhine I/II/III Ethernet device driver
To compile this driver into the kernel, place the following lines in your kernel configuration file:
device miibus
device vr
Alternatively, to load the driver as a module at boot time, place the following line in loader.conf(5):
if_vr_load="YES"
The vr
driver provides support for PCI
Ethernet adapters and embedded controllers based on the VIA Technologies
VT3043 Rhine I, VT86C100A Rhine II, and VT6105/VT6105M Rhine III Fast
Ethernet controller chips.
The VIA Rhine chips use bus master DMA and have a descriptor layout designed to resemble that of the DEC 21x4x “tulip” chips. The register layout is different however and the receive filter in the Rhine chips is much simpler and is programmed through registers rather than by downloading a special setup frame through the transmit DMA engine. Transmit and receive DMA buffers must be longword aligned. The Rhine chips are meant to be interfaced with external physical layer devices via an MII bus. They support both 10 and 100Mbps speeds in either full or half duplex.
The vr
driver supports the following media
types:
The vr
driver supports the following media
options:
Note that the 100baseTX media type is only available if supported by the adapter. For more information on configuring this device, see ifconfig(8).
The vr
driver supports VIA Technologies
Rhine I, Rhine II, and Rhine III based Fast Ethernet adapters including:
The following variables are available as sysctl(8) variables:
Note that this condition only occurs when warm booting from another operating system. If you power down your system prior to booting FreeBSD, the card should be configured correctly.
altq(4), arp(4), miibus(4), netintro(4), ng_ether(4), polling(4), ifconfig(8)
The VIA Technologies VT86C100A data sheet, http://www.via.com.tw.
The vr
device driver first appeared in
FreeBSD 3.0.
The vr
driver was written by
Bill Paul
<wpaul@ctr.columbia.edu>.
The vr
driver always copies transmit mbuf
chains into longword-aligned buffers prior to transmission in order to
pacify the Rhine chips. If buffers are not aligned correctly, the chip will
round the supplied buffer address and begin DMAing from the wrong location.
This buffer copying impairs transmit performance on slower systems but
cannot be avoided. On faster machines (e.g. a Pentium II), the performance
impact is much less noticeable.
February 25, 2012 | Debian |